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Changing the computer performance locomotive, from process technology to computer architecture

dc.contributor.authorWeiser, Uri
dc.date.accessioned2019-10-29T10:57:54Z
dc.date.available2019-10-29T10:57:54Z
dc.date.issued2019
dc.identifier.citationWeiser, U. "Changing the computer performance locomotive, from process technology to computer architecture". Barcelona: Barcelona Supercomputing Center, 2019.
dc.identifier.urihttp://hdl.handle.net/2117/171039
dc.format.extent2 p.
dc.language.isoeng
dc.publisherBarcelona Supercomputing Center
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshHigh performance computing
dc.titleChanging the computer performance locomotive, from process technology to computer architecture
dc.typeOther
dc.subject.lemacCàlcul intensiu (Informàtica)
dc.rights.accessOpen Access
local.citation.contributorSevero Ochoa Research Seminar Lectures at BSC (5th: 2019: Barcelona)
local.citation.pubplaceBarcelona
local.citation.publicationNameBook of abstracts
local.citation.startingPage19
local.citation.endingPage20


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