Supporting task creation inside FPGA devices

Document typeConference report
Defense date2019-05-07
PublisherBarcelona Supercomputing Center
Rights accessOpen Access
Except where otherwise noted, content on this work
is licensed under a Creative Commons license
:
Attribution-NonCommercial-NoDerivs 3.0 Spain
Abstract
The most common model to use co-processors/accelerators
is the master-slave model where the slaves (coprocessors/
accelerators) are driven by a general purpose
cpu. This simplifies the management of the accelerators
because they cannot actively interact with the runtime and
they are just passive slaves that operate over the memory
under demand. However, the master-slave model limits system
possibilities and introduces synchronization overheads that
could be avoided.
To overcome those limitations and increase the possibilities
of accelerators, we propose extending task based programming
models (like OpenMP [1] or OmpSs) to support some runtime
APIs inside the FPGA co-processor. As a proof-of-concept,
we implemented our proposal over the OmpSs@FPGA environment
[2] adding the needed infrastructure in the FPGA
bitstream and modifying the existing tools to support creation
of children tasks inside a task offloaded to an FPGA accelerator.
In addition, we added support to synchronize the children
tasks created by a FPGA task regardless they are executed in a
SMP host thread or they also target another FPGA accelerator
in the same co-processor.
CitationBosch Pons, J.; Álvarez Martínez, C.; Jiménez González, D. Supporting task creation inside FPGA devices. A: BSC Severo Ochoa International Doctoral Symposium (6th: 2019: Barcelona). "Book of abstracts". Barcelona: Barcelona Supercomputing Center, 2019, p. 34-35.
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