Data conversion in area-constrained applications: the wireless network-on-chip case
View/Open
08681465.pdf (351,4Kb) (Restricted access)
Request copy
Què és aquest botó?
Aquest botó permet demanar una còpia d'un document restringit a l'autor. Es mostra quan:
- Disposem del correu electrònic de l'autor
- El document té una mida inferior a 20 Mb
- Es tracta d'un document d'accés restringit per decisió de l'autor o d'un document d'accés restringit per política de l'editorial
Cita com:
hdl:2117/166911
Document typeConference report
Defense date
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
European Commission's projectVISORSURF - VisorSurf (EC-H2020-736876)
Abstract
Network-on-Chip (NoC) is currently the paradigm of choice to interconnect the different components of System-on-Chips (SoCs) or Chip Multiprocessors (CMPs). As the levels of integration continue to grow, however, current NoCs face significant scalability limitations and have prompted research in novel interconnect technologies. Among these, wireless intra-chip communications have been under intense scrutiny due to their low latency broadcast and architectural flexibility. Thus far, the practicality of the idea has been studied from the RF front-end and the network interface perspectives, whereas little to no attention has been placed on another essential component: the data converters. This article aims to fill this gap by providing a comprehensive analysis of the requirements of the scenario, as well as of the current performance and cost trends of Analog-to-Digital Converters (ADCs). Based on Murmann's data, we demonstrate that ADCs will not be a roadblock for the realization of wireless intra-chip communications although current designs do not meet their demands fully.
CitationAbadal, S.; Alarcon, E. Data conversion in area-constrained applications: the wireless network-on-chip case. A: Conference on Design of Circuits and Integrated Systems. "XXXIII Conference on Design of Circuits and Integrated Systems (DCIS): DCIS 2018: proceedings: November 14th-16th 2018, Lyon, France". Institute of Electrical and Electronics Engineers (IEEE), p. 1-6.
ISBN9781728101712
Publisher versionhttps://ieeexplore.ieee.org/document/8681465
Files | Description | Size | Format | View |
---|---|---|---|---|
08681465.pdf![]() | 351,4Kb | Restricted access |
All rights reserved. This work is protected by the corresponding intellectual and industrial
property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public
communication or transformation of this work are prohibited without permission of the copyright holder