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Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetime

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hdl:2117/16582

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Rubio Sola, Jose AntonioMés informacióMés informacióMés informació
Amat Bertran, Esteve
Pouyan, Peyman
Document typeConference lecture
Defense date2012
PublisherIEEE Press. Institute of Electrical and Electronics Engineers
Rights accessRestricted access - publisher's policy
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
Process variations and device aging have a significant impact on the reliability and performance of nano scale integrated circuits. Proactive reconfiguration is an emerging technique to extend the lifetime of embedded SRAM memories. This work introduces a novel version that modifies and enhances the advantages of this method by considering the process variability impact on the memory components. Our results show between 30% and 45% SRAM lifetime increases over the existing proactive reconfiguration technique and between 1.7X and ~10X improvement over the non-proactive reconfiguration.
CitationRubio, J.A.; Amat, E.; Pouyan, P. Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetime. A: VLSI Test Symposium. "Proceedings of the VLSI Test Symposium". Hawaii: IEEE Press. Institute of Electrical and Electronics Engineers, 2012, p. 240-245. 
URIhttp://hdl.handle.net/2117/16582
Publisher versionhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6231060
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