Show simple item record

dc.contributor.authorGupta, Manoj
dc.contributor.authorSánchez Carracedo, Fermín
dc.contributor.authorLlosa Espuny, José Francisco
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2012-05-17T10:59:22Z
dc.date.available2012-05-17T10:59:22Z
dc.date.created2010
dc.date.issued2010
dc.identifier.citationGupta, M.; Sanchez, F.; Llosa, J. A low cost split-issue technique to improve performance of SMT clustered VLIW processors. A: IEEE International Parallel and Distributed Processing Symposium. "Proceedings of the IEEE International Symposium on Parallel & Distributed Processing 2010". Atlanta: 2010, p. 1-12.
dc.identifier.urihttp://hdl.handle.net/2117/15888
dc.description.abstractAbstract—Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreading (SMT) is a popular technique for improving processor performance. To maintain execution semantics, a VLIW instruction needs to be issued in entirety, which restricts the opportunities in SMT. Split-issue at operation-level is a technique that allows issuing a VLIW instruction in parts without breaking execution semantics. Issuing an instruction in parts allows non-conflicting part of an instruction to be issued along with other instructions and improves SMT performance. However, implementing splitissue at operation-level requires complex structures and is not practical for an embedded VLIW processor. This paper proposes cluster-level split-issue, which implements split-issue at a cluster-level boundary for clustered VLIW processors. Cluster-level split-issue has a very low hardware overhead in contrast to split-issue at operation-level. Experimental results show that cluster-level split-issue, despite being more restrictive than split-issue at operation-level, achieves similar performance and improves SMT performance significantly.
dc.format.extent12 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshEmbedded computer systems
dc.subject.lcshMultiprocessors
dc.subject.lcshParallel processing (Electronic computers)
dc.subject.lcshSimultaneous multithreading processors
dc.subject.otherClustered VLIW Processors
dc.subject.otherMultithreading
dc.titleA low cost split-issue technique to improve performance of SMT clustered VLIW processors
dc.typeConference report
dc.subject.lemacOrdinadors immersos, Sistemes d'
dc.subject.lemacMultiprocessadors
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/IPDPS.2010.5470351
dc.rights.accessOpen Access
drac.iddocument4466512
dc.description.versionPostprint (published version)
upcommons.citation.authorGupta, M.; Sanchez, F.; Llosa, J.
upcommons.citation.contributorIEEE International Parallel and Distributed Processing Symposium
upcommons.citation.pubplaceAtlanta
upcommons.citation.publishedtrue
upcommons.citation.publicationNameProceedings of the IEEE International Symposium on Parallel & Distributed Processing 2010
upcommons.citation.startingPage1
upcommons.citation.endingPage12


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder