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dc.contributor.authorBadia Sala, Rosa Maria
dc.contributor.authorPérez Cáncer, Josep Maria
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2012-05-17T09:00:43Z
dc.date.available2012-05-17T09:00:43Z
dc.date.created2009
dc.date.issued2009
dc.identifier.citationBadia, R. [et al.]. Impact of the memory hierarchy on shared memory architectures in multicore programming models. A: Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. "Proceedings of the 17th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'09)". Weimar: IEEE Computer Society Publications, 2009, p. 437-445.
dc.identifier.isbn978-0-7695-3544-9
dc.identifier.urihttp://hdl.handle.net/2117/15882
dc.description.abstractMany and multicore architectures put a big pressure in parallel programming but gives a unique opportunity to propose new programming models that automatically exploit the parallelism of these architectures. OpenMP is a very well known standard that exploits parallelism in shared memory architectures. SMPSs has recently been proposed as a task based programming model that exploits the parallelism at the task level and takes into account data dependencies between tasks. However, besides parallelism in the programming, the memory hierarchy impact in many/multi core architectures is a feature of large importance. This paper presents an evaluation of these two programming models with regard to the impact of different levels of the memory hierarchy in the duration of the application. The evaluation is based on tracefiles with hardware counters on the execution of a memory intensive benchmark in both programming models.
dc.format.extent9 p.
dc.language.isoeng
dc.publisherIEEE Computer Society Publications
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshMultiprocessors
dc.subject.lcshSystem design
dc.subject.otherSMP superscalar
dc.subject.otherProgramming models for multicore
dc.subject.otherTask scheduling
dc.subject.otherLocality exploitation
dc.titleImpact of the memory hierarchy on shared memory architectures in multicore programming models
dc.typeConference lecture
dc.subject.lemacMultiprocessadors
dc.subject.lemacDisseny de sistemes
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.description.peerreviewedPeer Reviewed
dc.rights.accessOpen Access
local.identifier.drac2433199
dc.description.versionPostprint (published version)
local.citation.authorBadia, R.; Pérez, J.; Ayguade, E.; Labarta, J.
local.citation.contributorEuromicro International Conference on Parallel, Distributed, and Network-Based Processing
local.citation.pubplaceWeimar
local.citation.publicationNameProceedings of the 17th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'09)
local.citation.startingPage437
local.citation.endingPage445


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