Impact of the memory hierarchy on shared memory architectures in multicore programming models
View/Open
Cita com:
hdl:2117/15882
Document typeConference lecture
Defense date2009
PublisherIEEE Computer Society Publications
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial
property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public
communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
Many and multicore architectures put a big pressure in parallel programming but gives a unique opportunity to propose new programming models that automatically exploit
the parallelism of these architectures. OpenMP is a very well known standard that exploits parallelism in shared memory architectures. SMPSs has recently been proposed as a task based programming model that exploits the parallelism at the task level and takes into account data dependencies between tasks. However, besides parallelism in the programming, the memory hierarchy impact in many/multi core architectures is a feature of large importance. This paper presents an evaluation of these two programming models with regard to the impact of different levels of the memory hierarchy in the duration of the application. The evaluation is based on tracefiles with hardware counters on the execution of a memory intensive benchmark in both programming models.
CitationBadia, R. [et al.]. Impact of the memory hierarchy on shared memory architectures in multicore programming models. A: Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. "Proceedings of the 17th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'09)". Weimar: IEEE Computer Society Publications, 2009, p. 437-445.
ISBN978-0-7695-3544-9
Files | Description | Size | Format | View |
---|---|---|---|---|
bandwidith rosab.pdf | PDP'09 | 990,0Kb | View/Open |