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dc.contributor.authorAragonès Cervera, Xavier
dc.contributor.authorMateo Peña, Diego
dc.contributor.authorBarajas Ojeda, Enrique
dc.contributor.authorCrespo-Yepes, A.
dc.contributor.authorRodríguez Martínez, Rosana
dc.contributor.authorMartin Martínez, Javier
dc.contributor.authorNafría Maqueda, Montserrat
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.identifier.citationAragones, X. [et al.]. Aging in CMOS RF linear power amplifiers: experimental comparison and modeling. A: IEEE International Symposium on Circuits and Systems. "2019 IEEE International Symposium on Circuits and Systems (ISCAS): proceedings: 26-29 May 2019: Sapporo, Japan". Institute of Electrical and Electronics Engineers (IEEE), 2019, p. 1-5.
dc.description.abstractThis paper characterizes experimentally the aging degradation experienced by two different 2.45 GHz power amplifier circuits of similar performance, implemented in a 65 nm CMOS technology. Results demonstrate the importance of the topology selection in order to guarantee robustness against aging effects, and thus the need to predict MOS parameter degradation during the design phase, accounting for the actual DC and RF operation conditions. For that purpose, we propose a semi-empirical compact model that, based on the RMS equivalent voltages at the transistor terminals during circuit operation, can provide an estimation of the aging degradation.
dc.format.extent5 p.
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència
dc.subject.lcshPower amplifiers
dc.subject.otherPower amplifier
dc.titleAging in CMOS RF linear power amplifiers: experimental comparison and modeling
dc.typeConference report
dc.subject.lemacAmplificadors de potència
dc.contributor.groupUniversitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.description.peerreviewedPeer Reviewed
dc.rights.accessRestricted access - publisher's policy
dc.description.versionPostprint (published version)
local.citation.authorAragones, X.; Mateo, D.; Barajas, E.; Crespo-Yepes, A.; Rodríguez, R.; Martin, J.; Nafría, M.
local.citation.contributorIEEE International Symposium on Circuits and Systems
local.citation.publicationName2019 IEEE International Symposium on Circuits and Systems (ISCAS): proceedings: 26-29 May 2019: Sapporo, Japan

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