Show simple item record

dc.contributorMateo Peña, Diego
dc.contributorAragonès Cervera, Xavier
dc.contributor.authorÁlvarez Sabaté, Àlex
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2019-06-20T06:27:07Z
dc.date.available2019-06-20T06:27:07Z
dc.date.issued2019-05-31
dc.identifier.urihttp://hdl.handle.net/2117/134812
dc.description.abstractThe advances in the semiconductor and wireless industry have enabled the expansion of new paradigms, which have given rise to concepts like Internet of Things (IoT). Apart from qualities like size, speed or cost, the ever-increasing demand for autonomy focuses all design efforts in the minimization of power consumption. Scaling technologies and the request to reduce power consumption have pushed designers towards lower supply voltages. Despite the fact that technology scalability allows for faster transistors, radio-frequency (RF) integrated circuit (IC) design accuses the reduction of the voltage supply through frequency response degradation, which significantly deteriorates the overall performance. Analog and RF circuits in highend applications require substantial gate voltage overdrive to maintain device speed, which further complicates the design due to the reduction of voltage headroom. As a consequence, the necessity to develop circuit topologies capable to deal with low-power and low-voltage stringent constraints well suited to applications requiring long battery life and low cost emerges. This work aims to implement a low-noise amplifier and mixer stages of a radio-frequency receiver front-end working under an ultra-low power (< 100 ?W) and ultra-low voltage (< 0.8V) scenario while targeting decent overall performance. To cope with the stringent power requirements, 28nm FD-SOI technology will be used to take maximum profit of aggressive forward body bias and enhance transistor performance.
dc.language.isoeng
dc.publisherUniversitat Politècnica de Catalunya
dc.rightsS'autoritza la difusió de l'obra mitjançant la llicència Creative Commons o similar 'Reconeixement-NoComercial- SenseObraDerivada'
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshRadio frequency
dc.subject.lcshInternet of things
dc.subject.otherultra-low power
dc.subject.otherultra-low voltage
dc.subject.otherFD-SOI
dc.subject.otherLNA
dc.subject.othermixer
dc.titleDesign of a RF communication receiver front-end for ultra-low power and voltage applications in a FDSOI 28nm technology
dc.typeMaster thesis
dc.subject.lemacRadiofreqüència
dc.subject.lemacInternet de les coses
dc.identifier.slugETSETB-230.138734
dc.rights.accessOpen Access
dc.date.updated2019-06-07T05:50:59Z
dc.audience.educationlevelMàster
dc.audience.mediatorEscola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record

Attribution-NonCommercial-NoDerivs 3.0 Spain
Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain