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Automating synthesis of asynchronous communication mechanisms

dc.contributor.authorCortadella, Jordi
dc.contributor.authorCosta Gorgônio, Kyller
dc.contributor.authorXia, Fei
dc.contributor.authorYakovlev, Alex
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.date.accessioned2019-05-24T11:33:20Z
dc.date.available2019-05-24T11:33:20Z
dc.date.issued2005
dc.identifier.citationCortadella, J. [et al.]. Automating synthesis of asynchronous communication mechanisms. A: International Conference on Application of Concurrency to System Design. "Fifth International Conference on Application of Concurrency to System Design, ACSD 2005: 7-9 June 2005, St. Malo, France: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2005, p. 166-175.
dc.identifier.isbn0-7695-2363-3
dc.identifier.urihttp://hdl.handle.net/2117/133459
dc.description.abstractAsynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed processes in digital systems. In previous work, systematic ACM synthesis methods have been proposed. In this paper, we advance this work by developing algorithms and software tools which automate the major part of the ACM synthesis process. Firstly, an interleaving specification is constructed in the form of a state graph, and secondly, a Petri net model of an "ACM-type" is derived using the notion of an ACM-region. The method is applied to a number of "standard" writing and reading policies of ACMs with shared memory and unidirectional control variables.
dc.format.extent10 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telemàtica i xarxes d'ordinadors
dc.subject.lcshComputer networks -- Design and construction
dc.subject.lcshFormal methods (Computer science)
dc.subject.lcshPetri nets
dc.subject.otherAsynchronous communication
dc.subject.otherData communication
dc.subject.otherRead-write memory
dc.subject.otherCommunication system control
dc.subject.otherConnectors
dc.subject.otherInterleaved codes
dc.subject.otherComputer networks
dc.subject.otherJoining processes
dc.subject.otherCircuit synthesis
dc.subject.otherCommunication system software
dc.titleAutomating synthesis of asynchronous communication mechanisms
dc.typeConference report
dc.subject.lemacOrdinadors, Xarxes d' -- Disseny i construcció
dc.subject.lemacMètodes formals (Informàtica)
dc.subject.lemacPetri, Xarxes de
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
dc.identifier.doi10.1109/ACSD.2005.5
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/1508141
dc.rights.accessOpen Access
local.identifier.drac2432971
dc.description.versionPostprint (published version)
local.citation.authorCortadella, J.; Costa, K.; Xia, F.; Yakovlev, A.
local.citation.contributorInternational Conference on Application of Concurrency to System Design
local.citation.publicationNameFifth International Conference on Application of Concurrency to System Design, ACSD 2005: 7-9 June 2005, St. Malo, France: proceedings
local.citation.startingPage166
local.citation.endingPage175


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