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dc.contributor.authorCarmona Vargas, Josep
dc.contributor.authorCortadella, Jordi
dc.contributor.authorPastor Llorens, Enric
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2019-05-24T09:38:47Z
dc.date.available2019-05-24T09:38:47Z
dc.date.issued2001
dc.identifier.citationCarmona, J.; Cortadella, J.; Pastor, E. A structural encoding technique for the synthesis of asynchronous circuits. A: International Conference on Application of Concurrency to System Design. "Second International Conference on Application of Concurrency to System Design, 25-29 June 2001, Newcastle upon Tyne, UK: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2001, p. 157-166.
dc.identifier.isbn0-7695-1071-X
dc.identifier.urihttp://hdl.handle.net/2117/133434
dc.description.abstractThis paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such a way that a circuit implementation is always guaranteed. Moreover, a set of transformations is presented for the subclass of Free-Choice Petri nets that enables the exploration of different solutions. All transformations preserve the property of free-choiceness, thus enabling the use of structural methods for the synthesis of asynchronous circuits. Preliminary experimental results indicate that the quality of the circuits is comparable to that obtained by methods that require an exhaustive enumeration of the state space. This novel synthesis method opens the door to the synthesis of large control specifications generated from hardware description languages.
dc.format.extent10 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshAsynchronous circuits
dc.subject.lcshPetri nets
dc.subject.lcshLogic design
dc.subject.otherEncoding
dc.subject.otherCircuit synthesis
dc.subject.otherControl system synthesis
dc.subject.otherState-space methods
dc.subject.otherHardware design languages
dc.subject.otherClocks
dc.subject.otherAutomatic control
dc.subject.otherMinimization
dc.subject.otherExplosions
dc.titleA structural encoding technique for the synthesis of asynchronous circuits
dc.typeConference report
dc.subject.lemacCircuits asíncrons
dc.subject.lemacPetri, Xarxes de
dc.subject.lemacEstructura lògica
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/CSD.2001.981773
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/981773
dc.rights.accessOpen Access
drac.iddocument2377055
dc.description.versionPostprint (published version)
upcommons.citation.authorCarmona, J.; Cortadella, J.; Pastor, E.
upcommons.citation.contributorInternational Conference on Application of Concurrency to System Design
upcommons.citation.publishedtrue
upcommons.citation.publicationNameSecond International Conference on Application of Concurrency to System Design, 25-29 June 2001, Newcastle upon Tyne, UK: proceedings
upcommons.citation.startingPage157
upcommons.citation.endingPage166


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