Correct-by-construction microarchitectural pipelining

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hdl:2117/130965
Document typeConference report
Defense date2008
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
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Abstract
This paper presents a method for correct-by-construction microarchitectural pipelining that handles cyclic systems with dependencies between iterations. Our method combines previously known bypass and retiming transformations with a few transformations valid only for elastic systems with early evaluation (namely, empty FIFO insertion, FIFO capacity sizing, insertion of anti-tokens, and introducing early evaluation multiplexors). By converting the design to a synchronous elastic form and then applying this extended set of transformations, one can pipeline a functional specification with an automatically generated distributed controller that implements stalling logic resolving data hazards off the critical path of the design. We have developed an interactive toolkit for exploring elastic microarchitectural transformations. The method is illustrated by pipelining a few simple examples of instruction set architecture ISA specifications.
CitationKam, T. [et al.]. Correct-by-construction microarchitectural pipelining. A: IEEE/ACM International Conference on Computer-Aided Design. "2008 IEEE/ACM International Conference on Computer-Aided DesignDigest of Technical Papers". Institute of Electrical and Electronics Engineers (IEEE), 2008, p. 434-441.
ISBN978-1-4244-2819-9
Publisher versionhttps://ieeexplore.ieee.org/document/4681612
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