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Logic design of asynchronous circuits
dc.contributor.author | Cortadella, Jordi |
dc.contributor.author | Yakovlev, Alex |
dc.contributor.author | Garside, Jim |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Ciències de la Computació |
dc.date.accessioned | 2019-03-20T12:06:22Z |
dc.date.available | 2019-03-20T12:06:22Z |
dc.date.issued | 2002 |
dc.identifier.citation | Cortadella, J.; Yakovlev, A.; Garside, J. Logic design of asynchronous circuits. A: IEEE International Conference on VLSI Design. "7th Asia and South Pacific Design Automation Conference; 15th International Conference on VLSI Design: 7-11 January 2002, Bangalore, India: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2002, p. 26-27. |
dc.identifier.isbn | 0-7695-1441-3 |
dc.identifier.uri | http://hdl.handle.net/2117/130654 |
dc.description.abstract | Summary form only given. This tutorial aims at motivating the audience to consider asynchronous circuits as a competitive alternative to solve some of the design problems inherent to submicron technologies. One of the main reasons why designers are reluctant to incorporate asynchrony in their systems is the difficulty to design asynchronous circuits. Asynchronous circuits are promising to tackle problems such as electro-magnetic interference, power consumption, performance, and modularity of digital circuits. The tutorial will introduce state-of-the-art tools and methodologies for their design. It will cover aspects such as specification, architectural design and controller synthesis tools, of asynchronous circuits. The tutorial will concentrate on a particular design methodology for control circuits based on specifications with signal transition graphs. It will also cover design strategies for the microarchitecture, data-path and control circuits that have been successfully applied in the design of the asynchronous version of the ARM microprocessor. |
dc.format.extent | 2 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject.lcsh | Asynchronous circuits |
dc.subject.lcsh | Logic circuits |
dc.subject.lcsh | Electronic circuit design |
dc.subject.other | Logic design |
dc.subject.other | Design methodology |
dc.subject.other | Interference |
dc.subject.other | Energy consumption |
dc.subject.other | Digital circuits |
dc.subject.other | Circuit synthesis |
dc.subject.other | Control system synthesis |
dc.subject.other | Signal synthesis |
dc.subject.other | Microarchitecture |
dc.title | Logic design of asynchronous circuits |
dc.type | Conference report |
dc.subject.lemac | Circuits asíncrons |
dc.subject.lemac | Estructura lògica |
dc.subject.lemac | Circuits electrònics -- Disseny i construcció |
dc.contributor.group | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
dc.identifier.doi | 10.1109/ASPDAC.2002.994880 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/994880 |
dc.rights.access | Open Access |
local.identifier.drac | 2413839 |
dc.description.version | Postprint (published version) |
local.citation.author | Cortadella, J.; Yakovlev, A.; Garside, J. |
local.citation.contributor | IEEE International Conference on VLSI Design |
local.citation.publicationName | 7th Asia and South Pacific Design Automation Conference; 15th International Conference on VLSI Design: 7-11 January 2002, Bangalore, India: proceedings |
local.citation.startingPage | 26 |
local.citation.endingPage | 27 |