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dc.contributor.authorCortadella, Jordi
dc.contributor.authorYakovlev, Alex
dc.contributor.authorGarside, Jim
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.date.accessioned2019-03-20T12:06:22Z
dc.date.available2019-03-20T12:06:22Z
dc.date.issued2002
dc.identifier.citationCortadella, J.; Yakovlev, A.; Garside, J. Logic design of asynchronous circuits. A: IEEE International Conference on VLSI Design. "7th Asia and South Pacific Design Automation Conference; 15th International Conference on VLSI Design: 7-11 January 2002, Bangalore, India: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 2002, p. 26-27.
dc.identifier.isbn0-7695-1441-3
dc.identifier.urihttp://hdl.handle.net/2117/130654
dc.description.abstractSummary form only given. This tutorial aims at motivating the audience to consider asynchronous circuits as a competitive alternative to solve some of the design problems inherent to submicron technologies. One of the main reasons why designers are reluctant to incorporate asynchrony in their systems is the difficulty to design asynchronous circuits. Asynchronous circuits are promising to tackle problems such as electro-magnetic interference, power consumption, performance, and modularity of digital circuits. The tutorial will introduce state-of-the-art tools and methodologies for their design. It will cover aspects such as specification, architectural design and controller synthesis tools, of asynchronous circuits. The tutorial will concentrate on a particular design methodology for control circuits based on specifications with signal transition graphs. It will also cover design strategies for the microarchitecture, data-path and control circuits that have been successfully applied in the design of the asynchronous version of the ARM microprocessor.
dc.format.extent2 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshAsynchronous circuits
dc.subject.lcshLogic circuits
dc.subject.lcshElectronic circuit design
dc.subject.otherLogic design
dc.subject.otherDesign methodology
dc.subject.otherInterference
dc.subject.otherEnergy consumption
dc.subject.otherDigital circuits
dc.subject.otherCircuit synthesis
dc.subject.otherControl system synthesis
dc.subject.otherSignal synthesis
dc.subject.otherMicroarchitecture
dc.titleLogic design of asynchronous circuits
dc.typeConference report
dc.subject.lemacCircuits asíncrons
dc.subject.lemacEstructura lògica
dc.subject.lemacCircuits electrònics -- Disseny i construcció
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
dc.identifier.doi10.1109/ASPDAC.2002.994880
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/994880
dc.rights.accessOpen Access
local.identifier.drac2413839
dc.description.versionPostprint (published version)
local.citation.authorCortadella, J.; Yakovlev, A.; Garside, J.
local.citation.contributorIEEE International Conference on VLSI Design
local.citation.publicationName7th Asia and South Pacific Design Automation Conference; 15th International Conference on VLSI Design: 7-11 January 2002, Bangalore, India: proceedings
local.citation.startingPage26
local.citation.endingPage27


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