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dc.contributor.authorGrass, Thomas
dc.contributor.authorCarlson, Trevor E.
dc.contributor.authorRico Carro, Alejandro
dc.contributor.authorCeballos, Germán
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.authorCasas Guix, Marc
dc.contributor.authorMoreto Planas, Miquel
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2019-03-15T19:14:50Z
dc.date.available2019-03-15T19:14:50Z
dc.date.issued2019-02-01
dc.identifier.citationGrass, T. [et al.]. Sampled simulation of task-based programs. "IEEE transactions on computers", 1 Febrer 2019, vol. 68, núm. 2, p. 255-269.
dc.identifier.issn0018-9340
dc.identifier.urihttp://hdl.handle.net/2117/130498
dc.description© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works
dc.description.abstractSampled simulation is a mature technique for reducing simulation time of single-threaded programs. Nevertheless, current sampling techniques do not take advantage of other execution models, like task-based execution, to provide both more accurate and faster simulation. Recent multi-threaded sampling techniques assume that the workload assigned to each thread does not change across multiple executions of a program. This assumption does not hold for dynamically scheduled task-based programming models. Task-based programming models allow the programmer to specify program segments as tasks which are instantiated many times and scheduled dynamically to available threads. Due to variation in scheduling decisions, two consecutive executions on the same machine typically result in different instruction streams processed by each thread. In this paper, we propose TaskPoint, a sampled simulation technique for dynamically scheduled task-based programs. We leverage task instances as sampling units and simulate only a fraction of all task instances in detail. Between detailed simulation intervals, we employ a novel fast-forwarding mechanism for dynamically scheduled programs. We evaluate different automatic techniques for clustering task instances and show that DBSCAN clustering combined with analytical performance modeling provides the best trade-off of simulation speed and accuracy. TaskPoint is the first technique combining sampled simulation and analytical modeling and provides a new way to trade off simulation speed and accuracy. Compared to detailed simulation, TaskPoint accelerates architectural simulation with 8 simulated threads by an average factor of 220x at an average error of 0.5 percent and a maximum error of 7.9 percent.
dc.format.extent15 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica
dc.subject.lcshComputer simulation
dc.subject.otherSampled simulation
dc.subject.otherTask-based
dc.subject.otherAnalytical performance modeling
dc.titleSampled simulation of task-based programs
dc.typeArticle
dc.subject.lemacSimulació per ordinador
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/TC.2018.2860012
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/8424416
dc.rights.accessOpen Access
local.identifier.drac23661683
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
dc.relation.projectidinfo:eu-repo/grantAgreement/AGAUR/PRI2010-2013/2014 SGR 1051
dc.relation.projectidinfo:eu-repo/grantAgreement/AGAUR/PRI2010-2013/2014 SGR 1272
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/671697/EU/Mont-Blanc 3, European scalable and power efficient HPC platform based on low-power embedded technology/Mont-Blanc 3
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/687698/EU/High Performance and Embedded Architecture and Compilation/HiPEAC
local.citation.authorGrass, T.; Carlson, T.; Rico, A.; Ceballos, G.; Ayguade, E.; Casas, M.; Moreto, M.
local.citation.publicationNameIEEE transactions on computers
local.citation.volume68
local.citation.number2
local.citation.startingPage255
local.citation.endingPage269


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