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dc.contributor.authorBarajas Ojeda, Enrique
dc.contributor.authorAragonès Cervera, Xavier
dc.contributor.authorMateo Peña, Diego
dc.contributor.authorMoll Echeto, Francisco de Borja
dc.contributor.authorRubio Sola, Jose Antonio
dc.contributor.authorMartin Martínez, Javier
dc.contributor.authorRodríguez Martínez, Rosana
dc.contributor.authorPorti Pujal, Marc
dc.contributor.authorNafria, M.
dc.contributor.authorCastro López, Rafael
dc.contributor.authorRoca Moreno, Elisenda
dc.contributor.authorFernandez, Francisco V.
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.identifier.citationBarajas, E. [et al.]. Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology. A: International Workshop on Power and Timing Modeling, Optimization and Simulation. "2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018): 2-4 July 2018, Spain". Institute of Electrical and Electronics Engineers (IEEE), 2018, p. 82-87.
dc.description.abstractElectronic circuits powered at ultra low voltages (500 mV and below) are desirable for their low energy and power consumption. However, RTN (Random Telegraph Noise)-induced threshold voltage variations become very significant at such supply voltages. This paper evaluates the impact of RTN on additional jitter in a ring oscillator. Since FDSOI allows a large range of body bias voltages, this work studies how body biasing affects the oscillation frequency but also the jitter effects. The impact of RTN in NMOS and PMOS devices on frequency as well as the levels of supplementary jitter introduced by RTN are evaluated and compared with classical device noise.
dc.format.extent6 p.
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics
dc.subject.lcshElectronic circuits
dc.subject.otherBody Bias
dc.subject.otherRing Oscillators
dc.subject.otherUltra-Low Voltage Jitter
dc.subject.otherLow power electronics
dc.subject.otherMOS devices
dc.subject.otherOscillators (electronic)
dc.subject.otherThreshold voltage
dc.subject.otherBody bias
dc.subject.otherFdsoi technologies
dc.subject.otherOscillation frequency
dc.subject.otherRandom telegraph noise
dc.subject.otherRing oscillator
dc.subject.otherThreshold voltage variation
dc.subject.otherBias voltage
dc.titleAnalysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology
dc.typeConference report
dc.subject.lemacCircuits electrònics
dc.contributor.groupUniversitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.description.peerreviewedPeer Reviewed
dc.rights.accessRestricted access - publisher's policy
dc.description.versionPostprint (published version)
upcommons.citation.authorBarajas, E.; Aragones, X.; Mateo, D.; Moll, F.; Rubio, A.; Martin, J.; Rodríguez, R.; Porti, M.; Nafria, M.; Castro Lopez, R.; Roca, E.; Fernandez, F.
upcommons.citation.contributorInternational Workshop on Power and Timing Modeling, Optimization and Simulation
upcommons.citation.publicationName2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018): 2-4 July 2018, Spain

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