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Partial order based approach to synthesis of speed-independent circuits

dc.contributor.authorSemenov, Alex
dc.contributor.authorYakovlev, Alex
dc.contributor.authorPastor Llorens, Enric
dc.contributor.authorPeña Basurto, Marco Antonio
dc.contributor.authorCortadella, Jordi
dc.contributor.authorLavagno, Luciano
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Ciències de la Computació
dc.date.accessioned2019-02-28T11:58:43Z
dc.date.available2019-02-28T11:58:43Z
dc.date.issued1997
dc.identifier.citationSemenov, A. [et al.]. Partial order based approach to synthesis of speed-independent circuits. A: International Symposium on Advanced Research in Asynchronous Circuits and Systems. "Third International Symposium on Advanced Research in Asynchronous Circuits and Systems: April 7-10, 1997, Eindhoven, The Netherlands: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 1997, p. 254-265.
dc.identifier.isbn0-8186-7922-0
dc.identifier.urihttp://hdl.handle.net/2117/129959
dc.description.abstractThis paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the form of the STG-unfolding segment to derive the logic implementation using approximation techniques. It is based on a new nation of slice which localises the behaviour of a particular signal instance in a structural fragment of the segment. The experimental results show the power of the approximation approach in comparison with the existing methods.
dc.format.extent12 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshApproximation theory
dc.subject.lcshLogic circuits
dc.subject.lcshLogic design
dc.subject.otherCircuit synthesis
dc.subject.otherSignal synthesis
dc.subject.otherExplosions
dc.subject.otherData structures
dc.subject.otherBoolean functions
dc.subject.otherState-space methods
dc.subject.otherLogic functions
dc.subject.otherComputer architecture
dc.subject.otherNetwork synthesis
dc.subject.otherLibraries
dc.titlePartial order based approach to synthesis of speed-independent circuits
dc.typeConference report
dc.subject.lemacAproximació, Teoria de l'
dc.subject.lemacCircuits lògics
dc.subject.lemacEstructura lògica
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.contributor.groupUniversitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals
dc.identifier.doi10.1109/ASYNC.1997.587179
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/587179
dc.rights.accessOpen Access
local.identifier.drac2415157
dc.description.versionPostprint (published version)
local.citation.authorSemenov, A.; Yakovlev, A.; Pastor, E.; Peña, M.; Cortadella, J.; Lavagno, L.
local.citation.contributorInternational Symposium on Advanced Research in Asynchronous Circuits and Systems
local.citation.publicationNameThird International Symposium on Advanced Research in Asynchronous Circuits and Systems: April 7-10, 1997, Eindhoven, The Netherlands: proceedings
local.citation.startingPage254
local.citation.endingPage265


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