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Structural methods for the synthesis of speed-independent circuits
| dc.contributor.author | Pastor Llorens, Enric |
| dc.contributor.author | Cortadella, Jordi |
| dc.contributor.author | Kondratyev, Alex |
| dc.contributor.author | Roig Mansilla, Oriol |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Ciències de la Computació |
| dc.date.accessioned | 2019-02-21T10:39:06Z |
| dc.date.available | 2019-02-21T10:39:06Z |
| dc.date.issued | 1996 |
| dc.identifier.citation | Pastor, E. [et al.]. Structural methods for the synthesis of speed-independent circuits. A: European Design and Test Conference. "European Design & Test Conference, ED&TC 96: March 11-14, 1996, Paris, France: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 1996, p. 340-347. |
| dc.identifier.isbn | 0-8186-7424-5 |
| dc.identifier.uri | http://hdl.handle.net/2117/129510 |
| dc.description.abstract | Most existing tools for the synthesis of asynchronous circuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper presents novel methods exclusively based on the structural analysis of the underlying Petri net. This methodology can be applied to any STG that can be covered by State Machines and, in particular to all live and safe free-choice STGs. Significant improvements with regard to existing structural methods are provided. The new techniques have been implemented in an experimental tool that has been able to synthesize specifications with over 10/sup 27/ markings, some of them being non-free choice. |
| dc.format.extent | 8 p. |
| dc.language.iso | eng |
| dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
| dc.subject.lcsh | Asynchronous circuits |
| dc.subject.lcsh | Logic design |
| dc.subject.lcsh | Petri nets |
| dc.subject.other | Network synthesis |
| dc.subject.other | Signal flow graphs |
| dc.title | Structural methods for the synthesis of speed-independent circuits |
| dc.type | Conference report |
| dc.subject.lemac | Circuits asíncrons |
| dc.subject.lemac | Estructura lògica |
| dc.subject.lemac | Petri, Xarxes de |
| dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
| dc.contributor.group | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
| dc.identifier.doi | 10.1109/EDTC.1996.494323 |
| dc.description.peerreviewed | Peer Reviewed |
| dc.relation.publisherversion | https://ieeexplore.ieee.org/document/494323 |
| dc.rights.access | Open Access |
| local.identifier.drac | 2471663 |
| dc.description.version | Postprint (published version) |
| local.citation.author | Pastor, E.; Cortadella, J.; Kondratyev, A.; Roig, O. |
| local.citation.contributor | European Design and Test Conference |
| local.citation.publicationName | European Design & Test Conference, ED&TC 96: March 11-14, 1996, Paris, France: proceedings |
| local.citation.startingPage | 340 |
| local.citation.endingPage | 347 |
