High-Integrity GPU Designs for Critical Real-Time Automotive Systems
dc.contributor.author | Alcaide, Sergi |
dc.contributor.author | Kosmidis, Leonidas |
dc.contributor.author | Hernandez, Carles |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.other | Barcelona Supercomputing Center |
dc.date.accessioned | 2019-01-31T10:11:33Z |
dc.date.available | 2019-01-31T10:11:33Z |
dc.date.issued | 2019-04-16 |
dc.identifier.citation | Alcaide, S. [et al.]. High-Integrity GPU Designs for Critical Real-Time Automotive Systems. A: "". 2019, p. 1-6. |
dc.identifier.isbn | 978-3-9819263-2-3 |
dc.identifier.uri | http://hdl.handle.net/2117/127969 |
dc.description.abstract | Autonomous Driving (AD) imposes the use of highperformance hardware, such as GPUs, to perform object recognition and tracking in real-time. However, differently to the consumer electronics market, critical real-time AD functionalities require a high degree of resilience against faults, in line with the automotive ISO26262 functional safety standard requirements. ISO26262 imposes the use of some source of independent redundancy for the most critical functionalities so that a single fault cannot lead to a failure, being dual core lockstep (DCLS) with diversity the preferred choice for computing devices. Unfortunately, GPUs do not support diverse DCLS by construction, thus failing to meet ISO26262 requirements efficiently. In this paper we propose lightweight modifications to GPUs to enable diverse DCLS for critical real-time applications without diminishing their performance for non-critical applications. In particular, we show how enabling specific mechanisms for software-controlled kernel scheduling in the GPU, allows guaranteeing that redundant kernels can be executed in different resources so that a single fault cannot lead to a failure, as imposed by ISO26262. Our results on a GPU simulator and an NVIDIA GPU prove the viability of the approach and its effectiveness on high-performance GPU designs needed for AD systems. |
dc.description.sponsorship | This work has been partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grant TIN2015-65316-P and the HiPEAC Network of Excellence. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. Carles Hernandez is jointly funded by the MINECO and FEDER funds through grant TIN2014-60404-JIN. |
dc.format.extent | 6 p. |
dc.language.iso | eng |
dc.publisher | IEEE |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject.lcsh | Graphics processing units |
dc.subject.other | GPU designs |
dc.subject.other | Autonomous Driving (AD) |
dc.title | High-Integrity GPU Designs for Critical Real-Time Automotive Systems |
dc.type | Conference lecture |
dc.subject.lemac | Unitats de processament gràfic |
dc.identifier.doi | 10.23919/DATE.2019.8715177 |
dc.description.peerreviewed | Sí |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8715177 |
dc.rights.access | Open Access |
local.identifier.drac | 28129173 |
dc.description.version | Postprint (author's final draft) |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/ |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO//RYC-2013-14717/ES/RYC-2013-14717/ |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO//TIN2014-60404-JIN/ES/PROBABILISTIC TIMING ANALYSIS OF HIGH-PERFORMANCE AND RELIABLE PROCESSORS/ |
local.citation.publicationName | 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) |
local.citation.startingPage | 824 |
local.citation.endingPage | 829 |
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