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Unpredictable bits generation based on RRAM parallel configuration
dc.contributor.author | Arumi Delgado, Daniel |
dc.contributor.author | Gómez Pau, Álvaro |
dc.contributor.author | Manich Bou, Salvador |
dc.contributor.author | Rodríguez Montañés, Rosa |
dc.contributor.author | Bargalló, Mireia |
dc.contributor.author | Campabadal, Francesca |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2019-01-24T12:27:55Z |
dc.date.available | 2019-01-24T12:27:55Z |
dc.date.issued | 2018-12-12 |
dc.identifier.citation | Arumi, D. [et al.]. Unpredictable bits generation based on RRAM parallel configuration. "IEEE electron device letters", 12 Desembre 2018, vol. 40, núm. 2, p. 341-344. |
dc.identifier.issn | 0741-3106 |
dc.identifier.uri | http://hdl.handle.net/2117/127528 |
dc.description.abstract | In this letter a cell with the parallel combination of two TiN/Ti/HfO2/W resistive random access memory (RRAM) devices is studied for the generation of unpredictable bits. Measurements confirm that a simultaneous parallel SET operation in which one of the two RRAMs switches to the low resistance state (LRS) is an unpredictable process showing random properties for different sets of cells. Furthermore, given a device pair, the same device switches during subsequent write operations. The proposed cell is also analyzed under different current compliances and pulse widths with the same persistent behavior being observed. The features of the proposed cell, which provide data obfuscation without compromising reliability, pave the way for its application in Physical Unclonable Functions (PUFs) for hardware security purposes. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Seguretat informàtica |
dc.subject.lcsh | Electrodes |
dc.subject.lcsh | Electric resistance |
dc.subject.lcsh | Computer security |
dc.subject.other | RRAM |
dc.subject.other | variability |
dc.subject.other | PUF |
dc.subject.other | hardware security |
dc.title | Unpredictable bits generation based on RRAM parallel configuration |
dc.type | Article |
dc.subject.lemac | Elèctrodes |
dc.subject.lemac | Resistència elèctrica |
dc.subject.lemac | Seguretat informàtica |
dc.contributor.group | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
dc.identifier.doi | 10.1109/LED.2018.2886396 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | https://ieeexplore.ieee.org/document/8573799 |
dc.rights.access | Open Access |
local.identifier.drac | 23565247 |
dc.description.version | Postprint (author's final draft) |
dc.relation.projectid | info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016/TEC2017-84321-C4-1-R/ES/FABRICACION, CARACTERIZACION, SIMULACION, MODELADO Y APLICACIONES DE DISPOSITIVOS DE CONMUTACION RESISTIVA/ |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO//TEC2013-41209-P/ES/ANALISIS Y TECNICAS DE MEJORA DE LA ROBUSTEZ Y SEGURIDAD DE CIRCUITOS NANOMETRICOS EN PRESENCIA DE ATAQUES, DEFECTOS, VARIABILIDAD Y AGING/ |
dc.relation.projectid | info:eu-repo/grantAgreement/MINECO//TEC2014-54906-JIN/ES/CARACTERIZACION AVANZADA Y MODELADO DE LA VARIABILIDAD Y FIABILIDAD DE DISPOSITIVOS DE CONMUTACION RESISTIVA PARA APLICACIONES DE MEMORIA NO VOLATIL/ |
local.citation.author | Arumi, D.; Álvaro Gómez-Pau; Manich, S.; Rodriguez-Montanes, R.; Bargalló, M.; Campabadal, F. |
local.citation.publicationName | IEEE electron device letters |
local.citation.volume | 40 |
local.citation.number | 2 |
local.citation.startingPage | 341 |
local.citation.endingPage | 344 |
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