Mostra el registre d'ítem simple
Elasticity and Petri nets
dc.contributor.author | Cortadella, Jordi |
dc.contributor.author | Kishinevsky, Michael |
dc.contributor.author | Bufistov, Dmitry |
dc.contributor.author | Carmona Vargas, Josep |
dc.contributor.author | Julvez Bueno, Jorge Emilio |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Ciències de la Computació |
dc.date.accessioned | 2019-01-11T12:47:37Z |
dc.date.available | 2019-01-11T12:47:37Z |
dc.date.issued | 2008-01 |
dc.identifier.citation | Cortadella, J., Kishinevsky, M., Bufistov, D., Carmona, J., Julvez, J. Elasticity and Petri nets. "Transactions on petri nets and other models of concurrency", Gener 2008, vol. 1, p. 221-249. |
dc.identifier.issn | 1867-7193 |
dc.identifier.uri | http://hdl.handle.net/2117/126595 |
dc.description.abstract | Digital electronic systems typically use synchronous clocks and primarily assume fixed duration of their operations to simplify the design process. Time elastic systems can be constructed either by replacing the clock with communication handshakes (asynchronous version) or by augmenting the clock with a synchronous version of a handshake (synchronous version). Time elastic systems can tolerate static and dynamic changes in delays (asynchronous case) or latencies (synchronous case) of operations that can be used for modularity, ease of reuse and better power-delay trade-off. This paper describes methods for the modeling, performance analysis and optimization of elastic systems using Marked Graphs and their extensions capable of describing behavior with early evaluation. The paper uses synchronous elastic systems (aka latency-tolerant systems) for illustrating the use of Petri nets, however, most of the methods can be applied without changes (except changing the delay model associated with events of the system) to asynchronous elastic systems. |
dc.format.extent | 29 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject.lcsh | Asynchronous circuits |
dc.subject.lcsh | Petri nets |
dc.subject.other | Buffer sizing |
dc.subject.other | Elastic system |
dc.subject.other | Register count |
dc.subject.other | Marked graph |
dc.title | Elasticity and Petri nets |
dc.type | Article |
dc.subject.lemac | Circuits asíncrons |
dc.subject.lemac | Petri, Xarxes de |
dc.contributor.group | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
dc.identifier.doi | 10.1007/978-3-540-89287-8_13 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | https://link.springer.com/chapter/10.1007/978-3-540-89287-8_13 |
dc.rights.access | Open Access |
local.identifier.drac | 1623366 |
dc.description.version | Postprint (author's final draft) |
local.citation.author | Cortadella, J.; Kishinevsky, M.; Bufistov, D.; Carmona, J.; Julvez, J. |
local.citation.publicationName | Transactions on petri nets and other models of concurrency |
local.citation.volume | 1 |
local.citation.startingPage | 221 |
local.citation.endingPage | 249 |
Fitxers d'aquest items
Aquest ítem apareix a les col·leccions següents
-
Articles de revista [1.046]
-
Articles de revista [272]