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dc.contributor.authorBenedicte Illescas, Pedro
dc.contributor.authorHernández Gañán, Carlos
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorCazorla Almeida, Francisco Javier
dc.identifier.citationBenedicte Illescas, P. [et al.]. Improving Time-Randomized Cache Design. A: BSC Severo Ochoa International Doctoral Symposium (5th: 2018: Barcelona). "Book of abstracts". Barcelona: Barcelona Supercomputing Center, 2018, p. 64-65.
dc.description.abstractEnabling timing analysis for caches has been pursued by the critical real-time embedded systems (CRTES) community for years due to their potential to reduce worstcase execution times (WCET). Measurement-based protabilistic timing analysis (MBPTA) techniques have emerged as a solution to time-analyze complex hardware including caches, as long as they implement some random policies. Existing random placement and replacement policies have been proven efficient to some extent for single-level caches. However, they may lead to some probabilistic pathological eviction scenarios. In this work we propose new random placement and replacement policies specifically tailored for multi-level caches and for avoiding any type of pathological case.
dc.format.extent2 p.
dc.publisherBarcelona Supercomputing Center
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshHigh performance computing
dc.titleImproving time-randomized cache design
dc.typeConference report
dc.subject.lemacCàlcul intensiu (Informàtica)
dc.rights.accessOpen Access
upcommons.citation.contributorBSC Severo Ochoa International Doctoral Symposium (5th: 2018: Barcelona)
upcommons.citation.publicationNameBook of abstracts

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