Evaluation of A+B=K conditions without carry propagation

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hdl:2117/124893
Document typeArticle
Defense date1992-11
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
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Abstract
The response time of parallel adders is mainly determined by the carry propagation delay. The evaluation of conditions of the type A+B=K is addressed. Although an addition is involved in the comparison, it is shown that it can be evaluated without carry propagation, thus drastically reducing the computation time. Dependencies produced by branches degrade the performance of pipelined computers. The evaluation of conditions is often one of the critical paths in the execution of branch instructions. A circuit is proposed for the fast evaluation of A+B=K conditions that can significantly improve processor performance.
CitationCortadella, J., Llaberia, J. Evaluation of A+B=K conditions without carry propagation. "IEEE transactions on computers", Novembre 1992, vol. 41, núm. 11, p. 1484-1488.
ISSN0018-9340
Publisher versionhttps://ieeexplore.ieee.org/document/177318
Collections
- Departament d'Arquitectura de Computadors - Articles de revista [1.003]
- Departament de Ciències de la Computació - Articles de revista [996]
- CAP - Grup de Computació d'Altes Prestacions - Articles de revista [380]
- ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals - Articles de revista [245]
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