EOmesh: combined flow balancing and deterministic routing for reduced WCET estimates in embedded real-time systems

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hdl:2117/122000
Document typeArticle
Defense date2018-07-17
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ProjectSuPerCom - Sustainable Performance for High-Performance Embedded Computing Systems (EC-H2020-772773)
COMPUTACION DE ALTAS PRESTACIONES VII (MINECO-TIN2015-65316-P)
RYC-2013-14717 (MINECO-RYC-2013-14717)
PROBABILISTIC TIMING ANALYSIS OF HIGH-PERFORMANCE AND RELIABLE PROCESSORS (MINECO-TIN2014-60404-JIN)
COMPUTACION DE ALTAS PRESTACIONES VII (MINECO-TIN2015-65316-P)
RYC-2013-14717 (MINECO-RYC-2013-14717)
PROBABILISTIC TIMING ANALYSIS OF HIGH-PERFORMANCE AND RELIABLE PROCESSORS (MINECO-TIN2014-60404-JIN)
Abstract
The increasing performance needs in critical real-time embedded systems (CRTES) can only be satisfied with the use of high-performance manycore processors. While NoC-based manycore systems are popular in the high-performance domain due to their high average performance, they challenge deriving tight Worst-Case Execution Time (WCET) estimates, as needed in CRTES. Weighted meshes have been proposed to alleviate NoCs pathological behavior – caused by large bandwidth imbalance – by making locally unbalanced arbitration decisions to reach globally balanced bandwidth. In this paper we show that existing weighted mesh solutions do not completely remove unwanted imbalance, in particular for nodes subject to high congestion. We propose EOmesh, an approach that combines heterogeneous predictable routing and weight allocations that delivers near-optimal bandwidth allocation across cores without increasing NoC complexity. EOmesh, which can be implemented either by hardware means or by software means on top of regular weighted meshes, improves the average performance and WCET results of the reference weighted mesh design.
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CitationCardona, J., Abella, J., Hernandez Luz, Carles, Cazorla, F. J. EOmesh: combined flow balancing and deterministic routing for reduced WCET estimates in embedded real-time systems. "IEEE transactions on computer-aided design of integrated circuits and systems", 17 Juliol 2018, vol. 37, núm. 11, p. 2451-2461.
ISSN0278-0070
Publisher versionhttps://ieeexplore.ieee.org/document/8412546/
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