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Deep neural networks for earthquake detection and source region estimation in north-central Venezuela
(2020-10-01)
Article
Open AccessReliable earthquake detection algorithms are necessary to properly analyze and catalog the continuously growing seismic records. We report the results of applying a deep convolutional neural network, called UPC‐UCV ... -
Securing RSA hardware accelerators through residue checking
(2021-01)
Article
Restricted access - publisher's policyCircuits for the hardware acceleration of cryptographic algorithms are ubiquitously deployed in consumer and industrial products. Although being secure from a mathematical point of view, such accelerators may expose several ... -
The RECIPE approach to challenges in deeply heterogeneous high performance systems
(2020-09)
Article
Restricted access - publisher's policyRECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring ... -
Predictive reliability and fault management in exascale systems: State of the art and perspectives
(2020-09)
Article
Open AccessPerformance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, due ... -
A cost-efficient QoS-aware analytical model of future software content delivery networks
(2020-08-31)
Article
Restricted access - publisher's policyFreelance, part-time, work-at-home, and other flexible jobs are changing the concept of workplace, and bringing information and content exchange problems to companies. Geographically spread corporations may use remote ... -
Alternating direction implicit time integrations for finite difference acoustic wave propagation: parallelization and convergence
(Elsevier, 2020-06-15)
Article
Restricted access - publisher's policyThis work studies the parallelization and empirical convergence of two finite difference acoustic wave propagation methods on 2-D rectangular grids, that use the same alternating direction implicit (ADI) time integration. ... -
On the use of probabilistic worst-case execution time estimation for parallel applications in high performance systems
(Multidisciplinary Digital Publishing Institute (MDPI), 2020-03-01)
Article
Open AccessSome high performance computing (HPC) applications exhibit increasing real-time requirements, which call for effective means to predict their high execution times distribution. This is a new challenge for HPC applications ... -
Distributed training of deep neural networks with spark: The MareNostrum experience
(Elsevier, 2019-07-01)
Article
Restricted access - publisher's policyDeployment of a distributed deep learning technology stack on a large parallel system is a very complex process, involving the integration and configuration of several layers of both, general-purpose and custom software. ... -
Artificial neural networks as emerging tools for earthquake detection
(2019)
Article
Open AccessAs seismic networks continue to spread and monitoring sensors become more ef¿cient, the abundance of data highly surpasses the processing capabilities of earthquake interpretation analysts. Earthquake catalogs are fundamental ... -
SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
(Institute of Electrical and Electronics Engineers (IEEE), 2018-01-01)
Article
Open AccessCross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different ... -
Optimization of FinFET-based gain cells for low power sub-vt embedded drams
(2018-06-01)
Article
Open AccessSub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power electronics. The implementation of gain-cell embedded DRAMs (eDRAMs) based on FinFET devices requires a careful design to ... -
Replacing 6T SRAMs with 3T1D DRAMs in the L1 data cache to combat process variability
(2008-02)
Article
Open AccessWith continued technology scaling, process variations will be especially detrimental to six-transistor static memory structures (6T SRAMs). A memory architecture using three-transistor, one-diode DRAM (3T1D) cells in the ...
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