Recent Submissions

  • A survey of deep learning techniques for cybersecurity in mobile networks 

    Rodríguez Luna, Eva; Otero Calviño, Beatriz; Gutiérrez Escobar, Norma; Canal Corretger, Ramon (2021-06-07)
    Article
    Open Access
    The widespread use of mobile devices, as well as the increasing popularity of mobile services has raised serious cybersecurity challenges. In the last years, the number of cyberattacks has grown dramatically, as well as ...
  • Deep neural networks for earthquake detection and source region estimation in north-central Venezuela 

    Tous Liesa, Rubén; Alvarado Bermúdez, Leonardo; Otero Calviño, Beatriz; Cruz de la Cruz, Stalin Leonel; Rojas Ulacio, Otilio (2020-10-01)
    Article
    Open Access
    Reliable earthquake detection algorithms are necessary to properly analyze and catalog the continuously growing seismic records. We report the results of applying a deep convolutional neural network, called UPC‐UCV ...
  • Securing RSA hardware accelerators through residue checking 

    Lasheras Mas, Ana; Canal Corretger, Ramon; Rodríguez Luna, Eva; Cassano, Luca (2021-01)
    Article
    Restricted access - publisher's policy
    Circuits for the hardware acceleration of cryptographic algorithms are ubiquitously deployed in consumer and industrial products. Although being secure from a mathematical point of view, such accelerators may expose several ...
  • The RECIPE approach to challenges in deeply heterogeneous high performance systems 

    Agosta, Giovanni; Fornaciari, William; Atienza, David; Canal Corretger, Ramon; Cilardo, Alessandro; Flich Cardo, José; Hernández Luz, Carles; Kulczewski, Michal; Massari, Giuseppe; Tornero Gavilá, Rafael; Zapater Sancho, Marina (2020-09)
    Article
    Restricted access - publisher's policy
    RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring ...
  • Predictive reliability and fault management in exascale systems: State of the art and perspectives 

    Canal Corretger, Ramon; Hernández Luz, Carles; Tornero Gavilá, Rafael; Cilardo, Alessandro; Massari, Giuseppe; Reghenzani, Federico; Fornaciari, William; Zapater Sancho, Marina; Atienza, David; Oleksiak, Ariel; Wojciech Piatek, Poznan; Abella Ferrer, Jaume (2020-09)
    Article
    Open Access
    Performance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, due ...
  • A cost-efficient QoS-aware analytical model of future software content delivery networks 

    Otero Calviño, Beatriz; Rodríguez Luna, Eva; Rojas, Otilio; Verdú Mulà, Javier; Costa Prats, Juan José; Pajuelo González, Manuel Alejandro; Canal Corretger, Ramon (2021-07)
    Article
    Open Access
    Freelance, part-time, work-at-home, and other flexible jobs are changing the concept of workplace, and bringing information and content exchange problems to companies. Geographically spread corporations may use remote ...
  • Alternating direction implicit time integrations for finite difference acoustic wave propagation: parallelization and convergence 

    Otero Calviño, Beatriz; Rojas, Otilio; Moya, Ferrán; Castillo, José (Elsevier, 2020-06-15)
    Article
    Restricted access - publisher's policy
    This work studies the parallelization and empirical convergence of two finite difference acoustic wave propagation methods on 2-D rectangular grids, that use the same alternating direction implicit (ADI) time integration. ...
  • On the use of probabilistic worst-case execution time estimation for parallel applications in high performance systems 

    Fusi, Matteo; Mazzocchetti, Fabio; Farres, Albert; Kosmidis, Leonidas; Canal Corretger, Ramon; Cazorla Almeida, Francisco Javier; Abella Ferrer, Jaume (Multidisciplinary Digital Publishing Institute (MDPI), 2020-03-01)
    Article
    Open Access
    Some high performance computing (HPC) applications exhibit increasing real-time requirements, which call for effective means to predict their high execution times distribution. This is a new challenge for HPC applications ...
  • Distributed training of deep neural networks with spark: The MareNostrum experience 

    Cruz, Leonel; Tous Liesa, Rubén; Otero Calviño, Beatriz (Elsevier, 2019-07-01)
    Article
    Open Access
    Deployment of a distributed deep learning technology stack on a large parallel system is a very complex process, involving the integration and configuration of several layers of both, general-purpose and custom software. ...
  • Artificial neural networks as emerging tools for earthquake detection 

    Rojas, Otilio; Otero Calviño, Beatriz; Alvarado, Leonardo; Mus, Sergi; Tous Liesa, Rubén (2019)
    Article
    Open Access
    As seismic networks continue to spread and monitoring sensors become more ef¿cient, the abundance of data highly surpasses the processing capabilities of earthquake interpretation analysts. Earthquake catalogs are fundamental ...
  • SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems 

    Vallero, Alessandro; Savino, Alessandro; Chatzidimitriou, Athanansios; Kaliorakis, Manolis; Kooli, Maha; Riera Villanueva, Marc; Di Natale, Giorgio; Bosio, Alberto; Canal Corretger, Ramon; Gizopoulos, Dimitris; Di Carlo, Stefano; Anglada Sanchez , Martí; González Colás, Antonio María; Mariani, R. (Institute of Electrical and Electronics Engineers (IEEE), 2018-01-01)
    Article
    Open Access
    Cross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different ...
  • Optimization of FinFET-based gain cells for low power sub-vt embedded drams 

    Amat, Esteve; Calomarde Palomino, Antonio; Canal Corretger, Ramon; Rubio Sola, Jose Antonio (2018-06-01)
    Article
    Open Access
    Sub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power electronics. The implementation of gain-cell embedded DRAMs (eDRAMs) based on FinFET devices requires a careful design to ...

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