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dc.contributor.authorHussain, Tassadaq
dc.contributor.authorHaider, Amna
dc.contributor.authorCristal Kestelman, Adrián
dc.contributor.authorAyguadé Parra, Eduard
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2018-07-12T06:28:41Z
dc.date.available2020-04-23T00:26:33Z
dc.date.issued2018-06
dc.identifier.citationHussain, T., Haider, A., Cristal, A., Ayguade, E. EMVS: Embedded Multi Vector-core System. "Journal of systems architecture", Juny 2018, vol. 87, p. 12-22.
dc.identifier.issn1383-7621
dc.identifier.urihttp://hdl.handle.net/2117/119268
dc.description.abstractWith the increase in the density and performance of digital electronics, the demand for a power-efficient high-performance computing (HPC) system has been increased for embedded applications. The existing embedded HPC systems suffer from issues like programmability, scalability, and portability. Therefore, a parameterizable and programmable high-performance processor system architecture is required to execute the embedded HPC applications. In this work, we proposed an Embedded Multi Vector-core System (EMVS) which executes the embedded application by managing the multiple vectorized tasks and their memory operations. The system is designed and ported on an Altera DE4 FPGA development board. The performance of EMVS is compared with the Heterogeneous Multi-Processing Odroid XU3, Parallela and GPU Jetson TK1 embedded systems. In contrast to the embedded systems, the results show that EMVS improves 19.28 and 10.22 times of the application and system performance respectively and consumes 10.6 times less energy.
dc.format.extent11 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshParallel processing (Electronic computers)
dc.subject.lcshEmbedded computer systems
dc.subject.lcshMultiprocessors
dc.titleEMVS: Embedded Multi Vector-core System
dc.typeArticle
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.subject.lemacOrdinadors immersos, Sistemes d'
dc.subject.lemacMultiprocessadors
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1016/j.sysarc.2018.04.002
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttps://www.sciencedirect.com/science/article/pii/S1383762117303569
dc.rights.accessOpen Access
local.identifier.drac23171766
dc.description.versionPostprint (author's final draft)
local.citation.authorHussain, T.; Haider, A.; Cristal, A.; Ayguade, E.
local.citation.publicationNameJournal of systems architecture
local.citation.volume87
local.citation.startingPage12
local.citation.endingPage22


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Attribution-NonCommercial-NoDerivs 3.0 Spain
Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain