EMVS: Embedded Multi Vector-core System
Visualitza/Obre
10.1016/j.sysarc.2018.04.002
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/119268
Tipus de documentArticle
Data publicació2018-06
Condicions d'accésAccés obert
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Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya
Abstract
With the increase in the density and performance of digital electronics, the demand for a power-efficient high-performance computing (HPC) system has been increased for embedded applications. The existing embedded HPC systems suffer from issues like programmability, scalability, and portability. Therefore, a parameterizable and programmable high-performance processor system architecture is required to execute the embedded HPC applications. In this work, we proposed an Embedded Multi Vector-core System (EMVS) which executes the embedded application by managing the multiple vectorized tasks and their memory operations. The system is designed and ported on an Altera DE4 FPGA development board. The performance of EMVS is compared with the Heterogeneous Multi-Processing Odroid XU3, Parallela and GPU Jetson TK1 embedded systems. In contrast to the embedded systems, the results show that EMVS improves 19.28 and 10.22 times of the application and system performance respectively and consumes 10.6 times less energy.
CitacióHussain, T., Haider, A., Cristal, A., Ayguade, E. EMVS: Embedded Multi Vector-core System. "Journal of systems architecture", Juny 2018, vol. 87, p. 12-22.
ISSN1383-7621
Versió de l'editorhttps://www.sciencedirect.com/science/article/pii/S1383762117303569
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EMVS.pdf | 1,655Mb | Visualitza/Obre |