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Design and validation of a platform for electromagnetic fault injection

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10.1109/DCIS.2017.8311630
 
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hdl:2117/116688

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Balasch, Josep
Arumi Delgado, DanielMés informacióMés informacióMés informació
Manich Bou, SalvadorMés informacióMés informacióMés informació
Document typeConference report
Defense date2018
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
Attribution-NonCommercial-NoDerivs 3.0 Spain
Except where otherwise noted, content on this work is licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain
ProjectCathedral - Post-Snowden Circuits and Design Methods for Security (EC-H2020-695305)
Abstract
Security is acknowledged as one of the main challenges in the design and deployment of embedded circuits. Devices need to operate on-the-field safely and correctly, even when at physical reach of potential adversaries. One of the most powerful techniques to compromise the correct functioning of a device are fault injection attacks. They enable an active adversary to trigger errors on a circuit in order to bypass security features or to gain knowledge of security-sensitive information. There are several methods to induce such errors. In this work we focus on the injection of faults through the electromagnetic (EM) channel. In particular, we document our efforts towards building a suitable platform for EM pulse injection. We design a pulse injection circuit that can provide currents over 20 A to an EM injector in order to generate abrupt variations of the EM field on the vicinity of a circuit. We validate the suitability of our platform by applying a well-know attack on an embedded 8-bit microcontroller implementing the AES block cipher. In particular, we show how to extract the AES secret cryptographic keys stored in the device by careful injection of faults during the encryption operations and simple analysis of the erroneous outputs.
CitationBalasch, J., Arumi, D., Manich, S. Design and validation of a platform for electromagnetic fault injection. A: Conference on Design of Circuits and Integrated Systems. "Design of Circuits and Integrated Systems (DCIS), 2017 32nd Conference on". Institute of Electrical and Electronics Engineers (IEEE), 2018, p. 1-6. 
URIhttp://hdl.handle.net/2117/116688
DOI10.1109/DCIS.2017.8311630
ISBN978-1-5386-5108-7
Publisher versionhttp://ieeexplore.ieee.org/document/8311630/
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  • QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat - Ponències/Comunicacions de congressos [78]
  • Departament d'Enginyeria Electrònica - Ponències/Comunicacions de congressos [1.644]
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