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Experimental verification of memristor-based material implication NAND operation
dc.contributor.author | Maestro Izquierdo, Marcos |
dc.contributor.author | Martin Martínez, Javier |
dc.contributor.author | Crespo Yepes, Albert |
dc.contributor.author | Escudero López, Manuel |
dc.contributor.author | Rodríguez Martínez, Rosana |
dc.contributor.author | Nafría Maqueda, Montserrat |
dc.contributor.author | Aymerich Humet, Xavier |
dc.contributor.author | Rubio Sola, Jose Antonio |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2018-04-24T14:15:38Z |
dc.date.available | 2018-04-24T14:15:38Z |
dc.date.issued | 2017-10-11 |
dc.identifier.citation | Maestro, M., Martin, J., Crespo, A., Escudero, M., Rodríguez, R., Nafría, M., Aymerich , X., Rubio, A. Experimental verification of memristor-based material implication NAND operation. "IEEE Transactions on emerging topics in computing", 11 Octubre 2017, vol. 7, núm. 4, p. 545-552. |
dc.identifier.issn | 2168-6750 |
dc.identifier.uri | http://hdl.handle.net/2117/116636 |
dc.description.abstract | Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using <formula><tex>$\mathrm{Ni}/\mathrm{HfO}_{2}/\mathrm{Si}$</tex></formula> manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-steps IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well. |
dc.format.extent | 8 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject.lcsh | Electronic apparatus and appliances |
dc.subject.other | Current measurement |
dc.subject.other | Electrodes |
dc.subject.other | IMPLY function |
dc.subject.other | Logic gates |
dc.subject.other | material implication |
dc.subject.other | memristive circuits |
dc.subject.other | Memristors |
dc.subject.other | memristors |
dc.subject.other | NAND gate implementation |
dc.subject.other | Resistance |
dc.subject.other | resistive switching |
dc.subject.other | Switches |
dc.subject.other | Voltage measurement |
dc.title | Experimental verification of memristor-based material implication NAND operation |
dc.type | Article |
dc.subject.lemac | Components electrònics |
dc.subject.lemac | Electrònica -- Aparells i instruments |
dc.contributor.group | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.identifier.doi | 10.1109/TETC.2017.2760929 |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/8064732/ |
dc.rights.access | Open Access |
local.identifier.drac | 21591577 |
dc.description.version | Postprint (author's final draft) |
local.citation.author | Maestro, M.; Martin, J.; Crespo, A.; Escudero, M.; Rodríguez, R.; Nafría, M.; Aymerich, X.; Rubio, A. |
local.citation.publicationName | IEEE Transactions on emerging topics in computing |
local.citation.volume | 7 |
local.citation.number | 4 |
local.citation.startingPage | 545 |
local.citation.endingPage | 552 |
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