Ir al contenido (pulsa Retorno)

Universitat Politècnica de Catalunya

    • Català
    • Castellano
    • English
    • LoginRegisterLog in (no UPC users)
  • mailContact Us
  • world English 
    • Català
    • Castellano
    • English
  • userLogin   
      LoginRegisterLog in (no UPC users)

UPCommons. Global access to UPC knowledge

Banner header
69.058 UPC E-Prints
You are here:
View Item 
  •   DSpace Home
  • E-prints
  • Departaments
  • Departament d'Arquitectura de Computadors
  • Articles de revista
  • View Item
  •   DSpace Home
  • E-prints
  • Departaments
  • Departament d'Arquitectura de Computadors
  • Articles de revista
  • View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.

Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm

Thumbnail
View/Open
Preliminary article version (2,160Mb)
 
10.1016/j.mejo.2013.12.001
 
  View UPCommons Usage Statistics
  LA Referencia / Recolecta stats
Includes usage data since 2022
Cita com:
hdl:2117/115934

Show full item record
Amat Bertran, Esteve
García Almudéver, Carmen
Aymerich, N.
Canal Corretger, RamonMés informacióMés informacióMés informació
Rubio Sola, Jose AntonioMés informacióMés informacióMés informació
Document typeArticle
Defense date2014-10-01
Rights accessOpen Access
Attribution-NonCommercial-NoDerivs 3.0 Spain
This work is protected by the corresponding intellectual and industrial property rights. Except where otherwise noted, its contents are licensed under a Creative Commons license : Attribution-NonCommercial-NoDerivs 3.0 Spain
ProjectPRINCIPIOS DE DISEÑO Y TEST DE SISTEMAS INTEGRADOS EN TERA-ESCALA (MICINN-TEC2008-01856)
MICROARQUITECTURA Y COMPILADORES PARA FUTUROS PROCESADORES II (MICINN-TIN2010-18368)
Abstract
3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute 6T, highly affected by device variability as technology dimensions are reduced. In this work, we have shown that 22 nm 3T1D memory cells present significant tolerance to high levels of device parameter fluctuation. Moreover, we have observed that when variability is considered the write access transistor becomes a significant detrimental element on the 3T1D cell performance. Furthermore, resizing and temperature control have been presented as some valid strategies in order to mitigate the 3T1D cell variability.
CitationAmat, E., García, C., Aymerich, N., Canal, R., Rubio, A. Strategies to enhance the 3T1D-DRAM cell variability robustness beyond 22 nm. "Microelectronics journal", 1 Octubre 2014, vol. 45, núm. 10, p. 1342-1347. 
URIhttp://hdl.handle.net/2117/115934
DOI10.1016/j.mejo.2013.12.001
ISSN0026-2692
Publisher versionhttp://www.sciencedirect.com/science/article/pii/S0026269213002930
Collections
  • Departament d'Arquitectura de Computadors - Articles de revista [1.141]
  • HIPICS - High Performance Integrated Circuits and Systems - Articles de revista [92]
  • Departament d'Enginyeria Electrònica - Articles de revista [1.860]
  • ARCO - Microarquitectura i Compiladors - Articles de revista [73]
  View UPCommons Usage Statistics

Show full item record

FilesDescriptionSizeFormatView
Strategies.pdfPreliminary article version2,160MbPDFView/Open

Browse

This CollectionBy Issue DateAuthorsOther contributionsTitlesSubjectsThis repositoryCommunities & CollectionsBy Issue DateAuthorsOther contributionsTitlesSubjects

© UPC Obrir en finestra nova . Servei de Biblioteques, Publicacions i Arxius

info.biblioteques@upc.edu

  • About This Repository
  • Metadata under:Metadata under CC0
  • Contact Us
  • Send Feedback
  • Privacy Settings
  • Inici de la pàgina