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dc.contributor.authorBheesayagari, Chenna Reddy
dc.contributor.authorGorreta Mariné, Sergio
dc.contributor.authorPons Nin, Joan
dc.contributor.authorDomínguez Pumar, Manuel
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2018-04-03T08:14:52Z
dc.date.available2019-09-01T00:25:39Z
dc.date.issued2017-09-01
dc.identifier.citationBheesayagari, C., Gorreta, S., Pons, J., Dominguez, M. Second order sigma-delta control of charge trapping for MOS capacitors. "Microelectronics reliability", 1 Setembre 2017, vol. 76-77, p. 635-639.
dc.identifier.issn0026-2714
dc.identifier.urihttp://hdl.handle.net/2117/115875
dc.description.abstractThis paper presents the circuit topology of a second order sigma-delta control of charge trapping for MOS capacitors. With this new topology it is possible to avoid the presence of plateaus that can be found in first-order sigma-delta modulators. Plateaus are unwanted phenomena in which the control is locked for a certain time interval (of unknown duration). In this case the control output is constant and therefore the controlled device is in fact in open-loop configuration. It is shown that the presence of plateaus is avoided in MOS capacitors using the proposed approach.
dc.format.extent5 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subjectÀrees temàtiques de la UPC::Enginyeria de la telecomunicació::Processament del senyal
dc.subject.lcshDielectric devices
dc.subject.otherCharge trapping
dc.subject.otherMOS
dc.subject.otherDielectric charging
dc.subject.otherSigma-delta
dc.subject.otherSliding mode control
dc.titleSecond order sigma-delta control of charge trapping for MOS capacitors
dc.typeArticle
dc.subject.lemacDispositius dielèctrics
dc.contributor.groupUniversitat Politècnica de Catalunya. MNT - Grup de Recerca en Micro i Nanotecnologies
dc.identifier.doi10.1016/j.microrel.2017.06.096
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://www.sciencedirect.com/science/article/pii/S0026271417302846?via%3Dihub
dc.rights.accessOpen Access
drac.iddocument21631092
dc.description.versionPostprint (author's final draft)
upcommons.citation.authorBheesayagari, C.; Gorreta, S.; Pons, J.; Dominguez, M.
upcommons.citation.publishedtrue
upcommons.citation.publicationNameMicroelectronics reliability
upcommons.citation.volume76-77
upcommons.citation.startingPage635
upcommons.citation.endingPage639


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