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dc.contributor.authorAgirre, Irune
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorAzkarate-Askasua, Mikel
dc.contributor.authorCazorla, Francisco J.
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2018-03-27T14:01:29Z
dc.date.available2018-03-27T14:01:29Z
dc.date.issued2018-03-12
dc.identifier.citationAgirre, I. [et al.]. On the tailoring of CAST-32A certification guidance to real COTS multicore architectures. A: "Industrial Embedded Systems (SIES), 2017 12th IEEE International Symposium on". IEEE, 2018.
dc.identifier.isbn978-1-5386-3166-9
dc.identifier.urihttp://hdl.handle.net/2117/115862
dc.description.abstractThe use of Commercial Off-The-Shelf (COTS) multicores in real-time industry is on the rise due to multicores' potential performance increase and energy reduction. Yet, the unpredictable impact on timing of contention in shared hardware resources challenges certification. Furthermore, most safety certification standards target single-core architectures and do not provide explicit guidance for multicore processors. Recently, however, CAST-32A has been presented providing guidance for software planning, development and verification in multicores. In this paper, from a theoretical level, we provide a detailed review of CAST-32A objectives and the difficulty of reaching them under current COTS multicore design trends; at experimental level, we assess the difficulties of the application of CAST-32A to a real multicore processor, the NXP P4080.
dc.description.sponsorshipThis work has been partially supported by the Spanish Ministry of Economy and Competitiveness (MINECO) under grant TIN2015-65316-P and the HiPEAC Network of Excellence. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal grant RYC-2013-14717.
dc.format.extent8 p.
dc.language.isoeng
dc.publisherIEEE
dc.subjectÀrees temàtiques de la UPC::Informàtica
dc.subject.lcshHigh performance computing
dc.subject.otherTiming analysis
dc.subject.otherCOTS multicore
dc.subject.otherCertification
dc.titleOn the tailoring of CAST-32A certification guidance to real COTS multicore architectures
dc.typeConference lecture
dc.subject.lemacSupercomputadors
dc.identifier.doi10.1109/SIES.2017.7993376
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7993376/
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/PE2013-2016/TIN2015-65316-P
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO/PE2013-2016/RYC-2013-14717
local.citation.publicationNameIndustrial Embedded Systems (SIES), 2017 12th IEEE International Symposium on


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