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Replacing 6T SRAMs with 3T1D DRAMs in the L1 data cache to combat process variability
(2008-02)
Article.
Accés obert
Article.
Accés obert
With continued technology scaling, process variations will be especially detrimental to six-transistor static memory structures (6T SRAMs). A memory architecture using three-transistor, one-diode DRAM (3T1D) cells in the ...