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A comparison of cache hierarchies for SMT processors

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Suárez Gracía, Dario
Monreal Arnal, TeresaMés informacióMés informacióMés informació
Viñals Yúfera, Víctor
Document typeConference report
Defense date2011
PublisherUniversidad de La Laguna. Servicio de Publicaciones
Rights accessOpen Access
All rights reserved. This work is protected by the corresponding intellectual and industrial property rights. Without prejudice to any existing legal exemptions, reproduction, distribution, public communication or transformation of this work are prohibited without permission of the copyright holder
Abstract
In the multithread and multicore era, programs are forced to share part of the processor structures. On one hand, the state of the art in multithreading describes how efficiently manage and distribute inner resources such as reorder buffer or issue windows. On the other hand, there is a substantial body of works focused on outer resources, mainly on how to effectively share last level caches in multicores. Between these ends, first and second level caches have remained apart even if they are shared in most commercial multithreaded processors. This work analyzes multiprogrammed workloads as the worst-case scenario for cache sharing among threads. In order to obtain representative results, we present a sampling-based methodology that for multiple metrics such as STP, ANTT, IPC throughput, or fairness, reduces simulation time up to 4 orders of magnitude when running 8-thread workloads with an error lower than 3% and a confidence level of 97%. With the above mentioned methodology, we compare several state-of-the-art cache hierarchies, and observe that Light NUCA provides performance benefits in SMT processors regardless the organization of the last level cache. Most importantly, Light NUCA gains are consistent across the entire number of simulated threads, from one to eight.
CitationSuárez, D., Monreal, T., Viñals, V. A comparison of cache hierarchies for SMT processors. A: Jornadas de Paralelismo. "XXII Jornadas de Paralelismo: La Laguna, 7-9 septiembre 2011: actas". La Laguna, Tenerife: Universidad de La Laguna. Servicio de Publicaciones, 2011, p. 563-568. 
URIhttp://hdl.handle.net/2117/114160
ISBN978-84-694-1791-1
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  • CAP - Grup de Computació d'Altes Prestacions - Ponències/Comunicacions de congressos [783]
  • Departament d'Arquitectura de Computadors - Ponències/Comunicacions de congressos [1.858]
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