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Impact of clock drifts on communication-free secondary control schemes for inverter-based islanded microgrids
dc.contributor.author | Castilla Fernández, Miguel |
dc.contributor.author | Camacho Santiago, Antonio |
dc.contributor.author | Martí Colom, Pau |
dc.contributor.author | Velasco García, Manel |
dc.contributor.author | Moradi Ghahderijani, Mohammad |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria de Sistemes, Automàtica i Informàtica Industrial |
dc.date.accessioned | 2018-01-09T16:29:34Z |
dc.date.issued | 2017-11-13 |
dc.identifier.citation | Castilla, M., Camacho, A., Marti, P., Velasco, M., Moradi, M. Impact of clock drifts on communication-free secondary control schemes for inverter-based islanded microgrids. "IEEE transactions on industrial electronics", 13 Novembre 2017, vol. PP, núm. 9, p. 1-11. |
dc.identifier.issn | 0278-0046 |
dc.identifier.uri | http://hdl.handle.net/2117/112543 |
dc.description.abstract | IEEE In inverter-based microgrids, individual inverters operate usually with its own digital processor. The clocks used to generate the time signals of these processors differ from each other due to clock drifts. This paper analyzes the impact that the drifts of the processors clocks produce on the operation of inverter-based islanded microgrids. Several communication-free secondary control schemes are considered, which avoid well-known problems caused by digital communication networks. Active power sharing and frequency regulation are the metrics used to evaluate the performance of the secondary control schemes. The study reveals advantages, drawbacks, and practical limitations of the control schemes caused by the clock drifts. Therefore, it facilitates the selection of the most suitable control scheme for the practical deployment of microgrids. The theoretical results are validated by experimental tests in a laboratory microgrid equipped with three inverters and three digital signal processors driven by autonomous internal clocks. |
dc.format.extent | 11 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Processadors digitals |
dc.subject.lcsh | Process control--Data processing |
dc.subject.lcsh | Microgrids (Smart power grids) |
dc.subject.other | Clock synchronization |
dc.subject.other | communication-free control |
dc.subject.other | distributed control |
dc.subject.other | islanded microgrids |
dc.title | Impact of clock drifts on communication-free secondary control schemes for inverter-based islanded microgrids |
dc.type | Article |
dc.subject.lemac | Processadors digitals |
dc.subject.lemac | Xarxes elèctriques |
dc.contributor.group | Universitat Politècnica de Catalunya. SEPIC - Sistemes Electrònics de Potència i de Control |
dc.contributor.group | Universitat Politècnica de Catalunya. GRINS - Grup de Recerca en Robòtica Intel·ligent i Sistemes |
dc.identifier.doi | 10.1109/TIE.2017.2772178 |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/8106668/ |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 21671044 |
dc.description.version | Preprint |
dc.date.lift | 10000-01-01 |
local.citation.author | Castilla, M.; Camacho, A.; Marti, P.; Velasco, M.; Moradi, M. |
local.citation.publicationName | IEEE transactions on industrial electronics |
local.citation.volume | PP |
local.citation.number | 9 |
local.citation.startingPage | 1 |
local.citation.endingPage | 11 |
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