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dc.contributor.authorBoneti, Carlos
dc.contributor.authorGioiosa, Roberto
dc.contributor.authorCazorla, Francisco
dc.contributor.authorCorbalán González, Julita
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.authorValero Cortés, Mateo
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2018-01-08T10:32:01Z
dc.date.available2018-01-08T10:32:01Z
dc.date.issued2008
dc.identifier.citationBoneti, C., Gioiosa, R., Cazorla, F., Corbalán, J., Labarta, J., Valero, M. Balancing HPC applications through smart allocation of resources in MT processors. A: IEEE International Parallel and Distributed Processing Symposium. "IEEE International Symposium on Parallel and Distributed Processing, 2008: IPDPS 2008; 14-18 April 2008, Miami, Florida, USA". Miami, Florida: Institute of Electrical and Electronics Engineers (IEEE), 2008, p. 1-12.
dc.identifier.isbn978-1-4244-1694-3
dc.identifier.urihttp://hdl.handle.net/2117/112445
dc.description.abstractMany studies have shown that load imbalancing causes significant performance degradation in High Performance Computing (HPC) applications. Nowadays, Multi-Threaded (MT1) processors are widely used in HPC for their good performance/energy consumption and performance/cost ratios achieved sharing internal resources, like the instruction window or the physical register. Some of these processors provide the software hardware mechanisms for controlling the allocation of processor’s internal resources. In this paper, we show, for the first time, that by appropriately using these mechanisms, we are able to control the tasks speed, reducing the imbalance in parallel applications transparently to the user and, hence, reducing the total execution time. Our results show that our proposal leads to a performance improvement up to 18% for one of the NAS benchmark. For a real HPC application (much more dynamic than the benchmark) the performance improvement is 8.1%. Our results also show that, if resource allocation is not used properly, the imbalance of applications is worsened causing performance loss.
dc.format.extent12 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshHigh performance computing -- Energy consumption
dc.subject.lcshSimultaneous multithreading processors
dc.subject.lcshParallel computers
dc.subject.otherResource allocation
dc.subject.otherMulti-threading
dc.subject.otherParallel machines
dc.titleBalancing HPC applications through smart allocation of resources in MT processors
dc.typeConference report
dc.subject.lemacCàlcul intensiu (Informàtica) -- Consum d'energia
dc.subject.lemacOrdinadors paral·lels
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/IPDPS.2008.4536293
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/4536293/
dc.rights.accessOpen Access
local.identifier.drac2440611
dc.description.versionPostprint (published version)
local.citation.authorBoneti, C.; Gioiosa, R.; Cazorla, F.; Corbalán, J.; Labarta, J.; Valero, M.
local.citation.contributorIEEE International Parallel and Distributed Processing Symposium
local.citation.pubplaceMiami, Florida
local.citation.publicationNameIEEE International Symposium on Parallel and Distributed Processing, 2008: IPDPS 2008; 14-18 April 2008, Miami, Florida, USA
local.citation.startingPage1
local.citation.endingPage12


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