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MOM: a matrix SIMD instruction set architecture for multimedia applications
dc.contributor.author | Corbal San Adrián, Jesús |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.author | Espasa Sans, Roger |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2017-12-15T08:39:17Z |
dc.date.available | 2017-12-15T08:39:17Z |
dc.date.issued | 1999 |
dc.identifier.citation | Corbal, J., Valero, M., Espasa, R. MOM: a matrix SIMD instruction set architecture for multimedia applications. A: International Conference on Supercomputing. "SC'99: Proceedings of the 1999 ACM/IEEE Conference on Supercomputing". Portland, OR: Institute of Electrical and Electronics Engineers (IEEE), 1999, p. 1-12. |
dc.identifier.isbn | 1-58113-091-0 |
dc.identifier.uri | http://hdl.handle.net/2117/112117 |
dc.description.abstract | MOM is a novel matrix-oriented ISA paradigm for multimedia applications, based on fusing conventional vector ISAs with SIMD ISAs such as MMX. This paper justifies why MOM is a suitable alternative for the multimedia domain due to its efficiency handling the small matrix structures typically found in most multimedia kernels. MOM leverages a performance boost between 1.3x and 4x over more conventional multimedia extensions (such as MMX and MDMX), which already achieve performance benefits ranging from 1.3x to 15x over conventional Alpha code. Moreover, MOM exhibit a high relative performance for low-issue rates and a high tolerance to memory latency. Both advantages present MOM as an attractive alternative for the embedded domain. |
dc.format.extent | 12 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Multimedia systems |
dc.subject.lcsh | Embedded computer systems |
dc.subject.lcsh | Parallel processing (Electronic computers) |
dc.subject.other | Message-oriented middleware |
dc.subject.other | Registers |
dc.subject.other | Instruction sets |
dc.subject.other | Parallel processing |
dc.subject.other | Kernel |
dc.subject.other | Computer architecture |
dc.subject.other | Electronic mail |
dc.subject.other | Delay |
dc.subject.other | Embedded computing |
dc.subject.other | Graphics |
dc.title | MOM: a matrix SIMD instruction set architecture for multimedia applications |
dc.type | Conference report |
dc.subject.lemac | Sistemes multimèdia |
dc.subject.lemac | Ordinadors immersos, Sistemes d' |
dc.subject.lemac | Processament en paral·lel (Ordinadors) |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.identifier.doi | 10.1109/SC.1999.10055 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/1592658/ |
dc.rights.access | Open Access |
local.identifier.drac | 2402675 |
dc.description.version | Postprint (published version) |
local.citation.author | Corbal, J.; Valero, M.; Espasa, R. |
local.citation.contributor | International Conference on Supercomputing |
local.citation.pubplace | Portland, OR |
local.citation.publicationName | SC'99: Proceedings of the 1999 ACM/IEEE Conference on Supercomputing |
local.citation.startingPage | 1 |
local.citation.endingPage | 12 |