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Towards fair, scalable, locking
dc.contributor.author | Vallejo, Enrique |
dc.contributor.author | Sanyal, Sutirtha |
dc.contributor.author | Harris, Tim |
dc.contributor.author | Vallejo, Fernando |
dc.contributor.author | Beivide Palacio, Ramon |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2017-11-13T09:26:29Z |
dc.date.available | 2017-11-13T09:26:29Z |
dc.date.issued | 2008 |
dc.identifier.citation | Vallejo, E., Sanyal, S., Harris, T., Vallejo, F., Beivide, R., Unsal, O., Cristal, A., Valero, M. Towards fair, scalable, locking. A: Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods. "Proceedings of the 2008 Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods". Boston, Massachussetts: 2008, p. 1-6. |
dc.identifier.uri | http://hdl.handle.net/2117/110451 |
dc.description.abstract | Without care, Hardware Transactional Memory presents several performance pathologies that can degrade its performance. Among them, writers of commonly read variables can suffer from starvation. Though different solutions have been proposed for HTM systems, hybrid systems can still suffer from this performance problem, given that software transactions don’t interact with the mechanisms used by hardware to avoid starvation. In this paper we introduce a new per-directory-line hardware contention management mechanism that allows fairer access between both software and hardware threads without the need to abort any transaction. Our mechanism is based on “reserving” directory lines, implementing a limited fair queue for the requests on that line. We adapt the mechanism to the LogTM conflict detection mechanism and show that the resulting proposal is deadlock free. Finally, we sketch how the idea could be applied more generally to reader-writer locks. |
dc.format.extent | 6 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Memory management (Computer science) |
dc.subject.lcsh | Parallel processing (Electronic computers) |
dc.subject.other | Hardware transactional memory |
dc.subject.other | Reader starvation |
dc.subject.other | Synchronization |
dc.title | Towards fair, scalable, locking |
dc.type | Conference report |
dc.subject.lemac | Gestió de memòria (Informàtica) |
dc.subject.lemac | Processament en paral·lel (Ordinadors) |
dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.rights.access | Open Access |
local.identifier.drac | 21602402 |
dc.description.version | Postprint (published version) |
local.citation.author | Vallejo, E.; Sanyal, S.; Harris, T.; Vallejo, F.; Beivide, R.; Unsal, O.; Cristal, A.; Valero, M. |
local.citation.contributor | Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods |
local.citation.pubplace | Boston, Massachussetts |
local.citation.publicationName | Proceedings of the 2008 Workshop on Exploiting Parallelism with Transactional Memory and other Hardware Assisted Methods |
local.citation.startingPage | 1 |
local.citation.endingPage | 6 |