Is Arm software ecosystem ready for HPC?
Tipus de documentComunicació de congrés
Condicions d'accésAccés obert
Projecte de la Comissió EuropeaMont-Blanc 3 - Mont-Blanc 3, European scalable and power efficient HPC platformbased on low-power embedded technology (EC-H2020-671697)
MONT-BLANC - Mont-Blanc, European scalable and power efficient HPC platform based on low-power embedded technology (EC-FP7-288777)
MONT-BLANC 2 - Mont-Blanc 2, European scalable and power efficient HPC platform based onlow-power embedded technology (EC-FP7-610402)
In recent years, the HPC community has increasingly grown its interest towards the Arm architecture with research projects targeting primarily the installation of Arm-based clusters. State of the art research project examples are the European Mont-Blanc, the Japanese Post-K, and the UKs GW4/EPSRC. Primarily attention is usually given to hardware platforms, and the Arm HPC community is growing as the hardware is evolving towards HPC workloads via solutions borrowed from mobile market e.g., big.LITTLE and additions such as Armv8-A Scalable Vector Extension (SVE) technology. However the availability of a mature software ecosystem and the possibility of running large and complex HPC applications plays a key role in the consolidation process of a new technology, especially in a conservative market like HPC. For this reason in this poster we present a preliminary evaluation of the Arm system software ecosystem, limited here to the Arm HPC Compiler and the Arm Performance Libraries, together with a porting and testing of three fairly complex HPC code suites: QuantumESPRESSO, WRF and FEniCS. The selection of these codes has not been totally random: they have been in fact proposed as HPC challenges during the last two editions of the Student Cluster Competition at ISC where all the authors have been involved operating an Arm-based cluster and awarded with the Fan Favorite award.
CitacióBanchelli Gracia, F. F. [et al.]. Is Arm software ecosystem ready for HPC?. A: "SC17: International Conference for High Performance Computing, Networking, Storage and Analysis". 2017.
Versió de l'editorhttp://sc17.supercomputing.org/presentation/?id=post158&sess=sess293