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dc.contributor.authorServat, Harald
dc.contributor.authorPeña, Antonio J.
dc.contributor.authorLlort, German
dc.contributor.authorMercadal, Estanislao
dc.contributor.authorHoppe, Hans-Christian
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.identifier.citationServat, H., Peña, A., Llort, G., Mercadal, E., Hoppe, H., Labarta, J. Automating the application data placement in hybrid memory systems. A: International Conference on Cluster Computing. "2017 IEEE International Conferenceon Cluster Computing: 5-8 September 2017, Honolulu, Hawaii: proceedings". Honolulu, Hawai: Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 126-136.
dc.description.abstractMulti-tiered memory systems, such as those based on Intel® Xeon Phi™processors, are equipped with several memory tiers with different characteristics including, among others, capacity, access latency, bandwidth, energy consumption, and volatility. The proper distribution of the application data objects into the available memory layers is key to shorten the time– to–solution, but the way developers and end-users determine the most appropriate memory tier to place the application data objects has not been properly addressed to date.In this paper we present a novel methodology to build an extensible framework to automatically identify and place the application’s most relevant memory objects into the Intel Xeon Phi fast on-package memory. Our proposal works on top of inproduction binaries by first exploring the application behavior and then substituting the dynamic memory allocations. This makes this proposal valuable even for end-users who do not have the possibility of modifying the application source code. We demonstrate the value of a framework based in our methodology for several relevant HPC applications using different allocation strategies to help end-users improve performance with minimal intervention. The results of our evaluation reveal that our proposal is able to identify the key objects to be promoted into fast on-package memory in order to optimize performance, leading to even surpassing hardware-based solutions.
dc.description.sponsorshipThis work has been performed in the Intel-BSC Exascale Lab. Antonio J. Peña is cofinanced by the Spanish Ministry of Economy and Competitiveness under Juan de la Cierva fellowship number IJCI-2015-23266. We would like to thank the Intel’s DCG HEAT team for allowing us to access their computational resources. We also want to acknowledge this team, especially Larry Meadows and Jason Sewall, as well as Pardo Keppel for the productive discussions. We thank Raphaël Léger for allowing us to access the MAXW-DGTD application and its input.
dc.format.extent11 p.
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshParallel processing (Electronic computers)
dc.subject.otherResource management
dc.subject.otherMemory management
dc.subject.otherHeterogeneous memory
dc.subject.otherHybrid memory
dc.subject.otherHighbandwidth memory
dc.subject.otherPerformance analysis
dc.titleAutomating the application data placement in hybrid memory systems
dc.typeConference report
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.description.peerreviewedPeer Reviewed
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
local.citation.authorServat, H.; Peña, A.; Llort, G.; Mercadal, E.; Hoppe, H.; Labarta, J.
local.citation.contributorInternational Conference on Cluster Computing
local.citation.pubplaceHonolulu, Hawai
local.citation.publicationName2017 IEEE International Conferenceon Cluster Computing: 5-8 September 2017, Honolulu, Hawaii: proceedings

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