Automating the application data placement in hybrid memory systems
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Cita com:
hdl:2117/109407
Tipus de documentText en actes de congrés
Data publicació2017
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
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Abstract
Multi-tiered memory systems, such as those based on Intel® Xeon Phi™processors, are equipped with several memory tiers with different characteristics including, among others, capacity, access latency, bandwidth, energy consumption, and volatility. The proper distribution of the application data objects into the available memory layers is key to shorten the time– to–solution, but the way developers and end-users determine the most appropriate memory tier to place the application data objects has not been properly addressed to date.In this paper we present a novel methodology to build an extensible framework to automatically identify and place the application’s most relevant memory objects into the Intel Xeon Phi fast on-package memory. Our proposal works on top of inproduction binaries by first exploring the application behavior and then substituting the dynamic memory allocations. This makes this proposal valuable even for end-users who do not have the possibility of modifying the application source code. We demonstrate the value of a framework based in our methodology for several relevant HPC applications using different allocation strategies to help end-users improve performance with minimal intervention. The results of our evaluation reveal that our proposal is able to identify the key objects to be promoted into fast on-package memory in order to optimize performance, leading to even surpassing hardware-based solutions.
CitacióServat, H., Peña, A., Llort, G., Mercadal, E., Hoppe, H., Labarta, J. Automating the application data placement in hybrid memory systems. A: International Conference on Cluster Computing. "2017 IEEE International Conferenceon Cluster Computing: 5-8 September 2017, Honolulu, Hawaii: proceedings". Honolulu, Hawai: Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 126-136.
ISBN978-1-5386-2326-8
Versió de l'editorhttp://ieeexplore.ieee.org/abstract/document/8048924/
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