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On real time image processing on a network of PCs
dc.contributor.author | Millán, Pere |
dc.contributor.author | Montseny Masip, Eduard |
dc.date.accessioned | 2017-10-25T08:32:18Z |
dc.date.available | 2017-10-25T08:32:18Z |
dc.date.issued | 2005 |
dc.identifier.citation | Millán, P., Montseny, E. On real time image processing on a network of PCs. A: International Workshop on Computer Architecture for Machine Perception. "Seventh International Workshop on Computer Architecture for Machine Perception, CAMP 2005: 4-6 July 2005, Palermo, Italy: proceedings". Palermo: Institute of Electrical and Electronics Engineers (IEEE), 2005, p. 271-276. |
dc.identifier.isbn | 0-7695-2255-6 |
dc.identifier.uri | http://hdl.handle.net/2117/109113 |
dc.description.abstract | Many image processing algorithms have a very high execution time if only a processor is used for processing them. Using a SIMD parallel structure for its execution could reduce this time. This is particularly important in the case of algorithms that must be processed in real time. The use of networks of PC is an appealing solution that besides its low cost, takes advantage from both the high speed of actual interconnection networks, and the high-performance of PC. In this paper we present a model that explicitly considers system parameters, network parameters, and application parameters. So, the speed and communication model of the considered network, the workstations and PC computing power, the per-pixel computational cost of the algorithms (that can be constant or variable), and a variable number of computers have been considered. We do not aim to evaluate the processing of high and medium-level algorithms of a MISD structure, but we present the first results of our evaluations for iterative low-level image processing applications. Specifically, we give a prediction model to distribute the data to each processor of a distributed system, minimizing the processors' idle time. |
dc.format.extent | 6 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Processament del senyal::Processament de la imatge i del senyal vídeo |
dc.subject.lcsh | Real-time data processing |
dc.subject.lcsh | Image processing |
dc.subject.other | Distributed systems |
dc.subject.other | Load balancing |
dc.subject.other | Low-level image processing |
dc.subject.other | Real time image processing |
dc.title | On real time image processing on a network of PCs |
dc.type | Conference report |
dc.subject.lemac | Temps real (Informàtica) |
dc.subject.lemac | Imatges -- Processament |
dc.contributor.group | Universitat Politècnica de Catalunya. VIS - Visió Artificial i Sistemes Intel·ligents |
dc.identifier.doi | 10.1109/CAMP.2005.35 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/document/1508197/ |
dc.rights.access | Open Access |
local.identifier.drac | 2328365 |
dc.description.version | Postprint (published version) |
local.citation.author | Millán, P.; Montseny, E. |
local.citation.contributor | International Workshop on Computer Architecture for Machine Perception |
local.citation.pubplace | Palermo |
local.citation.publicationName | Seventh International Workshop on Computer Architecture for Machine Perception, CAMP 2005: 4-6 July 2005, Palermo, Italy: proceedings |
local.citation.startingPage | 271 |
local.citation.endingPage | 276 |