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dc.contributor.authorArvind
dc.date.accessioned2017-10-19T08:33:42Z
dc.date.available2017-10-19T08:33:42Z
dc.date.issued2017-09-10
dc.identifier.citationArvind. A memory model for RISC-V. A: 3rd Severo Ochoa Research Seminar Lectures at BSC, Barcelona, 2016-2017. "Book of abstracts". Barcelona: Barcelona Supercomputing Center, 2017, p. 51-52.
dc.identifier.urihttp://hdl.handle.net/2117/108841
dc.description.abstractHistorically memory models for multiprocessors have not been designed deliberately but have just emerged. Practically every microarchitectural optimization, which is transparent in a single threaded setting, becomes programmatically visible in a multithreaded setting. This has created a cottage industry for masochists who try to classify and understand every nuance of permitted behaviors. RISC-V offers us a unique opportunity to fix this historical wrong: specify a memory model first and make implementations conform to it. We will discuss the current proposals being debated for RISC-V memory model and point out the salient issues in this debate. These issues are atomic vs non-atomic memory systems, permitted instruction reorderings especially in the presence of dependencies, fences to control instruction reordering and ease of porting TSO programs to RISC-V. You will have a chance to express your opinions which I will report to the committee.
dc.format.extent2 p.
dc.language.isoeng
dc.publisherBarcelona Supercomputing Center
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshHigh performance computing
dc.titleA memory model for RISC-V
dc.title.alternativeJune 27th, 2017
dc.typeConference report
dc.subject.lemacCàlcul intensiu (Informàtica)
dc.rights.accessOpen Access
local.citation.contributor3rd Severo Ochoa Research Seminar Lectures at BSC, Barcelona, 2016-2017
local.citation.pubplaceBarcelona
local.citation.publicationNameBook of abstracts
local.citation.startingPage51
local.citation.endingPage52


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