Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach

Visualitza/Obre
Tipus de documentComunicació de congrés
Data publicació2017-09-28
EditorIEEE
Condicions d'accésAccés obert
Projecte de la Comissió Europea
ExaNoDe - European Exascale Processor Memory Node Design (EC-H2020-671578)Abstract
Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
CitacióRigo, A. [et al.]. Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. A: "Digital System Design (DSD), 2017 Euromicro Conference on". IEEE, 2017, p. 486-493.
ISBN978-1-5386-2146-2
Versió de l'editorhttp://ieeexplore.ieee.org/document/8049829/
Col·leccions
Fitxers | Descripció | Mida | Format | Visualitza |
---|---|---|---|---|
Paving the way ... ighly energy-efficient.pdf | 829.0Kb | Visualitza/Obre |
Llevat que s'hi indiqui el contrari, els continguts d'aquesta obra estan subjectes a la llicència de Creative Commons:
Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya