Performance analysis on the Intel Knights Landing architecture
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Inclou dades d'ús des de 2022
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hdl:2117/107993
Tipus de documentText en actes de congrés
Data publicació2017-05-04
EditorBarcelona Supercomputing Center
Condicions d'accésAccés obert
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Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya
Abstract
One of the emerging architectures in HPC systems is Intel’s Knights Landing (KNL) many core chip, which will also be part of BSC’s next HPC installation MareNostrum 4. KNL is the code name of the second generation of Intel XEON Phi, a many integrated core architecture (MIC) with up to 72 cores with four-time hyper-threading. It includes up to 384 GB of DDR4 RAM and 8-16 GB of stacked MCDRAM, a version of high bandwidth memory. In addition, each core will have two 512-bit vector units and will support AVX-512 SIMD instructions.
CitacióWagner, M.; Gimenez, J. Performance analysis on the Intel Knights Landing architecture. A: BSC Severo Ochoa International Doctoral Symposium (4th: 2017: Barcelona). "Book of abstracts". Barcelona: Barcelona Supercomputing Center, 2017, p. 66.
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