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dc.contributor.authorFuentes, Pablo
dc.contributor.authorVallejo, Enrique
dc.contributor.authorBeivide Palacio, Ramon
dc.contributor.authorMinkenberg, Cyriel
dc.contributor.authorValero Cortés, Mateo
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2017-09-15T07:37:07Z
dc.date.available2017-09-15T07:37:07Z
dc.date.issued2017
dc.identifier.citationFuentes, P., Vallejo, E., Beivide, R., Minkenberg, C., Valero, M. FlexVC: Flexible virtual channel management in low-diameter networks. A: IEEE International Parallel and Distributed Processing Symposium. "2017 IEEE 31st International Parallel and Distributed Processing Symposium: 29 May–2 June 2017, Orlando, Florida: proceedings". Orlando, Florida: Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 842-854.
dc.identifier.isbn978-1-5386-3914-6
dc.identifier.urihttp://hdl.handle.net/2117/107647
dc.description.abstractDeadlock avoidance mechanisms for lossless lowdistance networks typically increase the order of virtual channel (VC) index with each hop. This restricts the number of buffer resources depending on the routing mechanism and limits performance due to an inefficient use. Dynamic buffer organizations increase implementation complexity and only provide small gains in this context because a significant amount of buffering needs to be allocated statically to avoid congestion. We introduce FlexVC, a simple buffer management mechanism which permits a more flexible use of VCs. It combines statically partitioned buffers, opportunistic routing and a relaxed distancebased deadlock avoidance policy. FlexVC mitigates Head-of-Line blocking and reduces up to 50% the memory requirements. Simulation results in a Dragonfly network show congestion reduction and up to 37.8% throughput improvement, outperforming more complex dynamic approaches. FlexVC merges different flows of traffic in the same buffers, which in some cases makes more difficult to identify the traffic pattern in order to support nonminimal adaptive routing. An alternative denoted FlexVCminCred improves congestion sensing for adaptive routing by tracking separately packets routed minimally and nonminimally, rising throughput up to 20.4% with 25% savings in buffer area.
dc.description.sponsorshipThis work has been supported by the Spanish Government (grant SEV2015-0493 of the Severo Ochoa Program), the Spanish Ministry of Economy, Industry and Competitiveness (contracts TIN2015-65316), the Spanish Research Agency (AEI/FEDER, UE - TIN2016-76635-C2-2-R), the Spanish Ministry of Education (FPU grant FPU13/00337), the Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014- SGR-1272), the European Union FP7 programme (RoMoL ERC Advanced Grant GA 321253), the European HiPEAC Network of Excellence and the European Union’s Horizon 2020 research and innovation programme (Mont-Blanc project under grant agreement No 671697).
dc.format.extent13 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshRouting (Computer network management)
dc.subject.lcshTelecommunication -- Traffic -- Management
dc.subject.otherRouting
dc.subject.otherSystem recovery
dc.subject.otherPorts (Computers)
dc.subject.otherIndexes
dc.subject.otherOrganizations
dc.subject.otherThroughput
dc.subject.otherSensors
dc.subject.otherBuffer management
dc.subject.otherDeadlock avoidance
dc.titleFlexVC: Flexible virtual channel management in low-diameter networks
dc.typeConference report
dc.subject.lemacRouting (Computer network management)
dc.subject.lemacTelecomunicació -- Tràfic -- Gestió
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/IPDPS.2017.110
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/abstract/document/7967175/
dc.rights.accessOpen Access
local.identifier.drac21184673
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/671697/EU/Mont-Blanc 3, European scalable and power efficient HPC platform based on low-power embedded technology/Mont-Blanc 3
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/321253/EU/Riding on Moore's Law/ROMOL
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
local.citation.authorFuentes, P.; Vallejo, E.; Beivide, R.; Minkenberg, C.; Valero, M.
local.citation.contributorIEEE International Parallel and Distributed Processing Symposium
local.citation.pubplaceOrlando, Florida
local.citation.publicationName2017 IEEE 31st International Parallel and Distributed Processing Symposium: 29 May–2 June 2017, Orlando, Florida: proceedings
local.citation.startingPage842
local.citation.endingPage854


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