Exploring the voltage divider approach for accurate memristor state tuning
Document typeConference report
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multilevel programming. In this direction, we explore the voltage divider (VD) approach for highly controllable multi-state SET memristor tuning. We present the theoretical basis of operation, the main advantages and weaknesses. We finally propose an improved closed-loop VD SET scheme to tackle the variability effect and achieve <1% tuning precision, on average 3× faster than another accurate tuning algorithm of the recent literature.
CitationVourkas, I., Gomez, J., Abusleme, A., Vasileiadis, N., Sirakoulis, G., Rubio, A. Exploring the voltage divider approach for accurate memristor state tuning. A: Latin American Symposium on Circuits and Systems. "2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS 2017): Bariloche, Argentina: 20-23 February 2017". Bariloche: Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 1-4.
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