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dc.contributor.authorKehr, Sebastian
dc.contributor.authorQuiñones, Eduardo
dc.contributor.authorLangen, Dominik
dc.contributor.authorBöddeker, Bert
dc.contributor.authorSchäfer, Günter
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2017-07-24T14:35:44Z
dc.date.available2017-07-24T14:35:44Z
dc.date.issued2017-06-08
dc.identifier.citationKehr, S. [et al.]. Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications. A: "2017 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)". Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 343-352.
dc.identifier.urihttp://hdl.handle.net/2117/106764
dc.description.abstractEmbedded multicore processors are an attractive alternative to sophisticated single-core processors for the use in automobile electronic control units (ECUs), due to their expected higher performance and energy efficiency. Parallelization approaches for AUTOSAR legacy software exploit these benefits. Nevertheless, these approaches focus on extracting performance neglecting the system's worst-case sensor/actuator latency and energy consumption. This paper presents Parcus, an energy-and latency-aware parallelization technique that combines both runnable-and tasklevel parallelism. Parcus explicitly models the traversal of data from sensor to actuator through task instances, enabling to consider the latency imposed by parallelization techniques. The parallel schedule quality (PSQ) metric quantifies the success of the parallelization, for which it takes the latency and the processor frequency into account. We demonstrate the applicability of Parcus with an automotive case study. The results show that Parcus can fully utilize the processor's energy-saving potential.
dc.description.sponsorshipThis research received funding from the EU FP7 no. 287519 (parMERASA), the ARTEMIS-JU no. 621429 (EMC2), and the German Federal Ministry of Education and Research.
dc.format.extent10 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica
dc.subject.lcshParallel processing (Electronic computers)
dc.subject.lcshSoftware
dc.subject.otherAutomotive engineering
dc.subject.otherSchedules
dc.subject.otherMulticore processing
dc.subject.otherProgram processors
dc.subject.otherParallel processing
dc.subject.otherActuators
dc.titleParcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications
dc.typeConference lecture
dc.subject.lemacProgramari
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.identifier.doi10.1109/RTAS.2017.4
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7939052/
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/287519/EU/Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability/PARMERASA
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/FP7/621429/EU/Embedded Multi-Core Systems for Mixed Criticality Applications in Dynamic and Changeable Real-Time Environments/EMC2
upcommons.citation.publishedtrue
upcommons.citation.publicationName2017 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)
upcommons.citation.startingPage343
upcommons.citation.endingPage352


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