Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications
Document typeConference lecture
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessOpen Access
European Commisision's projectPARMERASA - Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability (EC-FP7-287519)
EMC2 - Embedded Multi-Core Systems for Mixed Criticality Applications in Dynamic and Changeable Real-Time Environments (EC-FP7-621429)
Embedded multicore processors are an attractive alternative to sophisticated single-core processors for the use in automobile electronic control units (ECUs), due to their expected higher performance and energy efficiency. Parallelization approaches for AUTOSAR legacy software exploit these benefits. Nevertheless, these approaches focus on extracting performance neglecting the system's worst-case sensor/actuator latency and energy consumption. This paper presents Parcus, an energy-and latency-aware parallelization technique that combines both runnable-and tasklevel parallelism. Parcus explicitly models the traversal of data from sensor to actuator through task instances, enabling to consider the latency imposed by parallelization techniques. The parallel schedule quality (PSQ) metric quantifies the success of the parallelization, for which it takes the latency and the processor frequency into account. We demonstrate the applicability of Parcus with an automotive case study. The results show that Parcus can fully utilize the processor's energy-saving potential.
CitationKehr, S. [et al.]. Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications. A: "2017 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)". Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 343-352.