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dc.contributor.authorSantana Jaria, Oliverio J.
dc.contributor.authorRamírez Bellido, Alejandro
dc.contributor.authorValero Cortés, Mateo
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2017-07-20T09:56:17Z
dc.date.available2017-07-20T09:56:17Z
dc.date.issued2005
dc.identifier.citationSantana, O., Ramírez , A., Valero, M. "Predicting multiple streams per cycle". 2005.
dc.identifier.urihttp://hdl.handle.net/2117/106641
dc.description.abstractThe next stream predictor is an accurate branch predictor that provides stream level sequencing. Every stream prediction contains a full stream of instructions, that is, a sequence of instructions from the target of a taken branch to the next taken branch, potentially containing multiple basic blocks. The long size of instruction streams makes it possible for the stream predictor to provide high fetch bandwidth and to tolerate the prediction table access latency. Therefore, an excellent way for improving the behavior of the next stream predictor is to enlarge instruction streams. In this paper, we provide a comprehensive analysis of dynamic instruction streams, showing that focusing on particular kinds of stream is not a good strategy due to Amdahl's law. Consequently, we propose the multiple stream predictor, a novel mechanism that deals with all kinds of streams by combining single streams into long virtual streams. We show that our multiple stream predictor is able to tolerate the prediction table access latency without requiring the complexity caused by additional hardware mechanisms like prediction overriding, also reducing the overall branch predictor energy consumption.
dc.format.extent19 p.
dc.language.isoeng
dc.relation.ispartofseriesUPC-DAC-RR-CAP-2005-13
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject.lcshMicroprocessors
dc.subject.lcshParallel processing (Electronic computers)
dc.titlePredicting multiple streams per cycle
dc.typeExternal research report
dc.subject.lemacMicroprocessadors
dc.subject.lemacProcessament en paral·lel (Ordinadors)
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.rights.accessOpen Access
drac.iddocument21185744
dc.description.versionPostprint (published version)
upcommons.citation.authorSantana, O., Ramírez , A., Valero, M.
upcommons.citation.publishedtrue


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