In critical domains, the advent of high-performance (complex) hardware, used to
provide the rising levels of guaranteed performance, complicates providing evidence
of reliable software execution specially on aspects related to the timing dimension.
Caches and multicores are two of the hardware features that have the potential to
significantly reduce worst-case execution time (WCET) estimates, yet they pose
new challenges on current-practice measurement-based timing analysis (MBTA)
approaches.
MBTA methods rely on some form of instrumentation, either at hardware or
software level, of the target program or fragments thereof to collect execution-time
measurement data. Instrumentation does affect the timing and functional behavior
of a program, resulting in the so-called probe effect: leaving the instrumentation code
in the final executable can negatively affect average performance and could not be
even admissible under stringent industrial qualification and certification standards;
removing it before operation jeopardizes the results of timing analysis as the WCET
estimates on the instrumented version of the program cannot be valid any more due,
for example, to the timing effects incurred by different cache alignments.
Measurement-Based Probabilistic Timing Analysis (MBPTA) is a variant of
MBTA that aims at increasing the confidence on WCET estimates. MBPTA aims at
relieving the user from controlling hardware sources of jitter. MBPTA implicitly
controls the impact of jittery resources on measurements captured at analysis.
Some hardware resources are randomized so that their execution times at analysis
vary according to a probabilistic execution time distribution that can be used to
upperbound the latencies during operation and give a WCET prediction with a certain
probability.
In this Master Thesis we present our approach to mitigate the impact of
instrumentation code on cache behavior by reducing the instrumentation overhead
while at the same time preserving and consolidating the results of timing
analysis. We further propose a technique for multilevel-cache multicores that
combines deterministic and probabilistic jitter-bounding approaches to reliably handle
variability in execution time generated by caches and the contention in accessing
shared hardware resources.
